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100 public repositories
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应用内网发布分发测试部署管理平台版本管理类似蒲公英蒲公英 类似fir.im fir App publish IOS超级签名免签 开源| https://app-space.up.railway.app |APP增量热更新| 支持iOS、Android、flutter、 react-native更新摇一摇提Bug SDK 提供自动化部署jenkins fastlane 丰富组件库 安卓苹果发布发版publish 管理发发布适用于企业手机应用内测服务应用内测托管的平台开源
Self-hosted Beta App Distribution for Android, iOS, macOS, Linux and Windows apps | 开源自部署移动应用、 macOS、Linux 和 Windows 应用分发平台,提供 iOS、Android SDK、fastlane 等丰富组件库
Updated
May 19, 2025
Ruby
Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.
Updated
Sep 23, 2024
Jupyter Notebook
应用内网发布平台| 类似蒲公英|fir|iOS OTA (Over-the-Air) | APP publish website like fir.im | 适用于企业 iOS & Android 内网发布测试使用,方便管理和分发 APP 包
A flexible cross-platform IIR and FIR engine for crossovers, room correction etc.
Updated
Apr 27, 2025
Rust
Audio DSP effects build on Android system framework layer. This is a repository contains a pack of high quality DSP algorithms specialized for audio processing.
Android APP update library./android app自动检测更新库
Updated
May 24, 2018
Java
Fir.im通道APK更新器,使用简单,让自己的demo快速具备升级功能
《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Updated
Oct 18, 2024
SystemVerilog
Updated
May 27, 2017
Swift
libdspl-2.0 is opensource cross-platform digital signal processing algorithm library, written in C language.
IIO AD9361 library for filter design and handling, multi-chip sync, etc.
FIR & LMS filter implementation in C++ with Python & JAVA wrappers
The Symphony Media Bridge (SMB) is a media server application that handles audio, video and screen sharing media streams in an RTC conference system.
An Arduino finite impulse response and infinite impulse response filter library.
betaqr.com(fir.im) fastlane plugin
Updated
Mar 27, 2023
Ruby
Implementation of FIR and IIR filters optimized for SIMD processing
FIR implemention with Verilog
Updated
May 18, 2019
Verilog
Folve - seamlessly FIR convolving audio file fuse filesystem with gapless support.
The Design and Implementation of a Pulse Compression Filter on an FPGA.
Updated
Aug 7, 2021
Verilog
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