Binary Arithmetic
1
Binary
Arithmetic
Switching
Theory
Semiconductor
Technology
Digital Systems
2
Boolean
Algebra
DIGITAL
CIRCUITS
Why Binary Arithmetic?
3
3 + 5
0011 + 0101
= 8
= 1000
4
Why Binary Arithmetic?
• Hardware can only deal with binary digits,
0 and 1.
• Must represent all numbers, integers or
floating point, positive or negative, by
binary digits, called bits.
• Can devise electronic circuits to perform
arithmetic operations: add, subtract,
multiply and divide, on binary numbers.
5
Positive Integers
• Decimal system: made of 10 digits, {0,1,2, . . . , 9}
41 = 4×101
+ 1×100
255 = 2×102
+ 5×101
+ 5×100
• Binary system: made of two digits, {0,1}
00101001 = 0×27
+ 0×26
+ 1×25
+ 0×24
+1×23
+ 0×22
+ 0×21
+ 1×20
= 32 + 8 +1 = 41
11111111 = 255, largest number with 8
binary digits, 28
-1
6
Base or Radix
• For decimal system, 10 is called the base
or radix.
• Decimal 41 is also written as 4110 or 41ten
• Base (radix) for binary system is 2.
• Thus, 41ten = 1010012 or
101001two
• Also, 111ten = 1101111two
and 111two = 7ten
7
Signed Magnitude – What Not to Do
• Use fixed length binary representation
• Use left-most bit (called most significant bit
or MSB) for sign:
0 for positive
1 for negative
• Example: +18ten = 00010010two
–18ten = 10010010two
8
Difficulties with Signed Magnitude
• Sign and magnitude bits should be differently
treated in arithmetic operations.
• Addition and subtraction require different logic
circuits.
• Overflow is difficult to detect.
• “Zero” has two representations:
+ 0ten = 00000000two
– 0ten = 10000000two
• Signed-integers are not used in modern
computers.
Problems with Finite Math
• Finite size of representation:
• Digital circuit cannot be arbitrarily large.
• Overflow detection – easy to determine when
the number becomes too large.
• Represent negative numbers:
• Unique representation of 0.
9
-4 0 4 8 12 16 20
0000 0100 1000 1100 10000 10100
Infinite
universe
of integers
∞
-∞
4-bit numbers
4-bit Universe
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 10
Modulo-16
(4-bit)
universe
16/0
8
4
12 0100
1000
1100
0000
15
1111 0
8
4
12 0100
1000
1100
0000
-0
1111
15
-7
7 7
0111
-3
0001 0001
Only 16 integers: 0 through 15, or – 7 through 7
One Way to Divide Universe
1’s Complement Numbers
11
0
8
4
12 0100
1000
1100
0000
-0
1111
15
-7 7
0111
-3
0001
Decimal
magnitude
Binary number
Positive Negative
0 0000 1111
1 0001 1110
2 0010 1101
3 0011 1100
4 0100 1011
5 0101 1010
6 0110 1001
7 0111 1000
Negation rule: invert bits.
Problem: 0 ≠ – 0
Another Way to Divide Universe
2’s Complement Numbers
12
0
8
4
12 0100
1000
1100
0000
-1
1111
15
-8 7
0111
-4
0001
Decimal
magnitude
Binary number
Positive Negative
0 0000
1 0001 1111
2 0010 1110
3 0011 1101
4 0100 1100
5 0101 1011
6 0110 1010
7 0111 1001
8 1000
Negation rule: invert bits
and add 1
Subtract 1
on this side
13
Integers With Sign – Two Ways
• Use fixed-length representation, but no
explicit sign bit:
• 1’s complement: To form a negative number,
complement each bit in the given number.
• 2’s complement: To form a negative number, start
with the given number, subtract one, and then
complement each bit, or
first complement each bit, and then add 1.
• 2’s complement is the preferred
representation.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 14
2’s-Complement Integers
• Why not 1’s-complement? Don’t like two
zeros.
• Negation rule:
• Subtract 1 and then invert bits, or
• Invert bits and add 1
• Some properties:
• Only one representation for 0
• Exactly as many positive numbers as negative
numbers
• Slight asymmetry – there is one negative number
with no positive counterpart
General Method for Binary
Integers with Sign
• Select number (n) of bits in representation.
• Partition 2n
integers into two sets:
• 00…0 through 01…1 are 2n
/2 positive integers.
• 10…0 through 11…1 are 2n
/2 negative integers.
• Negation rule transforms negative to positive, and vice-
versa:
• Signed magnitude: invert MSB (most significant bit)
• 1’s complement: Subtract from 2n
– 1 or 1…1 (same as
“inverting all bits”)
• 2’s complement: Subtract from 2n
or 10…0 (same as 1’s
complement + 1)
15
Three Systems (n = 4)
16
0000
1000
0111
1111
1010 = – 2
Signed magnitude
0000
1000
1111
1010 = – 5
1’s complement integers
0010
1010 1010 0111
2
– 2
6
– 5
0000
1000
1111
10000
1010 = – 6
2’s complement integers
1010
0111
6
– 6
0
– 0
0
– 7 – 8
7 7
0
– 0
7
– 7
– 1
17
Three Representations
Sign-magnitude
000 = +0
001 = +1
010 = +2
011 = +3
100 = - 0
101 = - 1
110 = - 2
111 = - 3
2’s complement
000 = +0
001 = +1
010 = +2
011 = +3
100 = - 4
101 = - 3
110 = - 2
111 = - 1
(Preferred)
1’s complement
000 = +0
001 = +1
010 = +2
011 = +3
100 = - 3
101 = - 2
110 = - 1
111 = - 0
18
2’s Complement Numbers (n = 3)
0
+
1
+
2
+
3
-
1
-
2
-
3
- 4
000
001
010
011
100
101
110
111
addition
subtraction
P
o
s
i
t
i
v
e
n
u
m
b
e
r
s
N
e
g
a
t
i
v
e
n
u
m
b
e
r
s
Overflow
Negation
19
2’s Complement n-bit Numbers
• Range: – 2n –1
through 2n –1
– 1
• Unique zero: 00000000 . . . . . 0
• Negation rule: see slide 11 or 13.
• Expansion of bit length: stretch the left-most bit
all the way, e.g., 11111101 is still 101 or – 3.
Also, 00000011 is same as 011 or 3.
• Most significant bit (MSB) indicates sign.
• Overflow rule: If two numbers with the same sign
bit (both positive or both negative) are added,
the overflow occurs if and only if the result has
the opposite sign.
• Subtraction rule: for A – B, add – B and A.
Summary
• For a given number (n) of digits we have a
finite set of integers. For example, there are
103
= 1,000 decimal integers and 23
= 8
binary integers in 3-digit representations.
• We divide the finite set of integers [0, rn
– 1],
where radix r = 10 or 2, into two equal parts
representing positive and negative numbers.
• Positive and negative numbers of equal
magnitudes are complements of each other:
x + complement (x) = 0.
20
Summary: Defining Complement
• Decimal integers:
• 10’s complement: – x = Complement (x) = 10n
– x
• 9’s complement: – x = Complement (x) = 10n
– 1 – x
• For 9’s complement, subtract each digit from 9
• For 10’s complement, add 1 to 9’s complement
• Binary integers:
• 2’s complement: – x = Complement (x) = 2n
– x
• 1’s complement: – x = Complement (x) = 2n
– 1 – x
• For 1’s complement, subtract each digit from 1
• For 2’s complement, add 1 to 1’s complement
21
Understanding Complement
• Complement means “something that
completes”:
e.g., X + complement (X) = “Whole”.
• Complement also means “opposite”,
e.g., complementary colors are placed
opposite in the primary color chart.
• Complementary numbers are like electric
charges. Positive and negative charges
of equal magnitudes annihilate each
other.
22
2’s-Complement Numbers
23
. . . -1 0 1 2 3 4 5 . . .
000 001 010 011 100 101
Infinite
universe
of integers
∞
-∞
000
499
500
1000
001
999
501
Finite
Universe of
3-digit
Decimal
numbers
000
011
100
1000
001
111
101
Finite
Universe
of 3-bit
binary
numbers
Examples of Complements
• Decimal integers (r = 10, n = 3):
• 10’s complement: – 50 = Compl (50) = 103
– 50 =
950; 50 + 950 = 1,000 = 0 (in 3 digit representation)
• 9’s complement: – 50 = Compl (50) = 10n
– 1 – 50 =
949; 50 + 949 = 999 = – 0 (in 9’s complement rep.)
• Binary integers (r = 2, n = 4):
• 2’s complement: – 5 = Complement (5) = 24
– 5 =
1110 or 1011; 5 + 11 = 16 = 0 (in 4-bit representation)
• 1’s complement: – 5 = Complement (5) = 24
– 1 – 5 =
1010 or 1010; 5 + 10 = 15 = – 0 (in 1’s complement
representation)
24
25
2’s-Complement to Decimal
Conversion
bn-1 bn-2 . . . b1 b0 = – 2n-1
bn-1 + Σ 2i
bi
i=
0
n-
2
-128 64 32 16 8 4 2 1
8-bit conversion
box
-128 64 32 16 8 4 2 1
1 1 1 1 1 1 0 1
Example
– 128 + 64 + 32 + 16 + 8 + 4 + 1 = – 128 + 125 = – 3
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 26
For More on 2’s-Complement
• Chapter 4 in D. E. Knuth, The Art of Computer
Programming: Seminumerical Algorithms, Volume II,
Second Edition, Addison-Wesley, 1981.
• A. al’Khwarizmi, Hisab al-jabr w’al-muqabala, 830.
• Read: A two part interview with D. E. Knuth,
Communications of the ACM (CACM), vol. 51, no. 7, pp.
35-39 (July), and no. 8, pp. 31-35 (August), 2008.
Donald E. Knuth (1938
- )
Abu Abd-Allah ibn Musa
al’Khwarizmi (~780 – 850)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 27
Addition
• Adding bits:
• 0 + 0 = 0
• 0 + 1 = 1
• 1 + 0 = 1
• 1 + 1 = (1) 0
• Adding integers:
carry
0 0 0 . . . . . . 0 1 1 1 two = 7ten
+ 0 0 0 . . . . . . 0 1 1 0 two = 6ten
= 0 0 0 . . . . . . 1 (1)1 (1)0 (0)1 two = 13ten
1 1
0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 28
Subtraction
• Direct subtraction
• Two’s complement subtraction by adding
0 0 0 . . . . . . 0 1 1 1 two = 7ten
– 0 0 0 . . . . . . 0 1 1 0 two = 6ten
= 0 0 0 . . . . . . 0 0 0 1two = 1ten
0 0 0 . . . . . . 0 1 1 1 two = 7ten
+ 1 1 1 . . . . . . 1 0 1 0 two = – 6ten
= 0 0 0 . . . . . . 0 (1) 0 (1) 0 (0)1 two = 1ten
1 1 1 . . . . . . 1 1
0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 29
Overflow: An Error
• Examples: Addition of 3-bit integers (range - 4 to +3)
• -2-3 = -5 110 = -2
+ 101 = -3
= 1011 = 3 (error)
• 3+2 = 5 011 = 3
010 = 2
= 101 = -3 (error)
• Overflow rule: If two numbers with the same sign bit
(both positive or both negative) are added, the overflow
occurs if and only if the result has the opposite sign.
0
1
2
3
-1
-
2
-
3
-
4
000
001
010
011
100
101
110
111
–
+
Overflow
crossing
Overflow and Finite Universe
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 30
. . .1111 0000 0001 0010 0011 0100 0101 . . .
Decrease Increase
Infinite
universe
of integers
No overflow
∞
-∞
0000
Forbidden fence
1000
0001
1111
1001
Finite
Universe
of 4-bit
binary
integers
0010
0011
0100
0101
0110
0111
1010
1011
1100
1101
1110
Increase
Decrease
Adding Two Bits
a b
s = a + b
Decimal Binary
0 0 0 00
0 1 1 01
1 0 1 01
1 1 2 10
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 31
SUM
CARRY
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 32
HA
Half-Adder Adds two Bits
“half” because it has no carry input
• Adding two bits:
a b a + b
0 0 00
0 1 01
1 0 01
1 1 10
carry sum
a
b
sum
carry
XOR
AND
Full Adder: Include Carry Input
a b c
s = a + b + c
Decimal value Binary value
0 0 0 0 00
0 0 1 1 01
0 1 0 1 01
0 1 1 2 10
1 0 0 1 01
1 0 1 2 10
1 1 0 2 10
1 1 1 3 11
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 33
SUM
CARRY
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 34
Full-Adder Adds Three Bits
a
b
XOR
AND
XOR
AND
OR
c
sum
carry
FA
HA
HA
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 35
32-bit Ripple-Carry Adder
FA0
FA1
FA2
FA31
a0
b0
c0 = 0
a1
b1
a2
b2
a31
b31
s0
s1
s2
c32
(discard)
s31
c31
c2
c1
c32 c31 . . . c2 c1 0
a31 . . . a2 a1 a0
+ b31 . . . b2 b1 b0
s31 . . . s2 s1 s0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 36
How Fast is Ripple-Carry Adder?
• Longest delay path (critical path) runs from
(a0, b0) to sum31.
• Suppose delay of full-adder is 100ps.
• Critical path delay = 3,200ps
• Clock rate cannot be higher than
1/(3,200×10 –12
) Hz = 312MHz.
• Must use more efficient ways to handle
carry.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 37
Speeding Up the Adder
16-bit
ripple
carry
adder
a0-
a15
b0-
b15
c0 = 0
s0-s15
16-bit
ripple
carry
adder
a16-
a31
b16-b31
0
16-bit
ripple
carry
adder
a16-
a31
b16-b31
1
Multiplexe
r
s16-s31
0
1
This is a carry-select
adder
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 38
Fast Adders
• In general, any output of a 32-bit adder
can be evaluated as a logic expression in
terms of all 65 inputs.
• Number of levels of logic can be reduced
to log2N for N-bit adder. Ripple-carry has
N levels.
• More gates are needed, about log2N times
that of ripple-carry design.
• Fastest design is known as carry
lookahead adder.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 39
N-bit Adder Design Options
Type of adder Time complexity
(delay)
Space complexity
(size)
Ripple-carry O(N) O(N)
Carry-lookahead O(log2N) O(N log2N)
Carry-skip O(√N) O(N)
Carry-select O(√N) O(N)
Reference: J. L. Hennessy and D. A. Patterson, Computer Architecture:
A Quantitative Approach, Second Edition, San Francisco, California,
1990, page A-46.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 40
Binary Multiplication (Unsigned)
1 0 0 0 two = 8ten multiplicand
1 0 0 1 two = 9ten multiplier
____________
1 0 0 0
0 0 0 0 partial
products
0 0 0 0
1 0 0 0
____________
1 0 0 1 0 0 0two = 72ten
Basic algorithm: For n = 1, 32,
only If nth bit of multiplier is 1,
then add multiplicand × 2 n –1
to product
Digital Circuits for Multiplication
• Need:
• Three registers for multiplicand, multiplier and product.
• Adder or arithmetic logic unit (ALU).
• What is a register
• A memory device – unit cell stores one bit.
• A 32-bit register has 32 storage cells. It can store a
32-bit integer.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 41
bit 0
bit 32
1 bit right shift divides integer by 2
1 bit left shift multiplies integer by 2
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 42
LSB
of
multipli
er
?
Multiplication Flowchart
Initialize product register to
0
Partial product number, n = 1
Left shift multiplicand register 1
bit
Right shift multiplier register 1 bit
n
= ?
n = n + 1
Done
Star
t
Add multiplicand to
product and place result
in product register
1 0
n <
32
n =
32
N = 32
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 43
Serial Multiplication
64-bit product register, initially 0
64
64
64
64-bit ALU
Test
LSB
N = 32
times
shift
right
32-bit multiplier
shift
left
write
3 operations per
bit:
shift right
shift left
add
Need 64-bit ALU
Multiplicand (expanded 64-
bits)
LSB =
0
LSB
= 1
add
Shift l/r
LSB
after
add
N = 32
after
add
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 44
Serial Multiplication (Improved)
Multiplicand
64-bit product register
32
32
32
32-bit ALU
Test LSB
32 times
LSB
(3) shift right
00000 . . . 00000 32-bit
multiplier
Initialized product
register
(2) w
rite
2 operations per
bit:
shift right
add
32-bit ALU
1
1
(1) add
1 or 0
N = 32
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 45
Example: 0010two× 0011two
Iteration Step Multiplicand Product
0 Initial values 0010 0000 0011
1 LSB =1 → Prod = Prod + Mcand 0010 0010 0011
Right shift product 0010 0001 0001
2 LSB =1 → Prod = Prod + Mcand 0010 0011 0001
Right shift product 0010 0001 1000
3 LSB = 0 → no operation 0010 0001 1000
Right shift product 0010 0000 1100
4 LSB = 0 → no operation 0010 0000 1100
Right shift product 0010 0000 0110
0010two × 0011two = 0110two, i.e., 2ten × 3ten = 6ten
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 46
Multiplying with Signs
• Convert numbers to magnitudes.
• Multiply the two magnitudes through 32
iterations.
• Negate the result if the signs of the
multiplicand and multiplier differed.
• Alternatively, the previous algorithm will work
with some modifications. See B. Parhami,
Computer Architecture, New York: Oxford
University Press, 2005, pp. 199-200.
Alternative Method with Signs
• In the improved method:
• Use 2N + 1 bit product register
• Use N + 1 bit multiplicand register
• Use N + 1 bit adder
• Proceed as in the improved method,
except –
• In the last (Nth) iteration, if LSB = 1,
subtract multiplicand instead of adding.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 47
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 48
Example 1: 1010two× 0011two
Iteration Step Multiplicand Product
0 Initial values 11010 00000 0011
1 LSB = 1 → Prod = Prod + Mcand 11010 11010 0011
Right shift product 11010 11101 0001
2 LSB = 1 → Prod = Prod + Mcand 11010 10111 0001
Right shift product 11010 11011 1000
3 LSB = 0 → no operation 11010 11011 1000
Right shift product 11010 11101 1100
4 LSB = 0 → no operation 11010 11101 1100
Right shift product 11010 11110 1110
1010two × 0011two = 101110two, i.e., – 6ten × 3ten = – 18ten
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 49
Example 2: 1010two× 1011two
Iteration Step Multiplicand Product
0 Initial values 11010 00000 1011
1 LSB =1 → Prod = Prod + Mcand 11010 11010 1011
Right shift product 11010 11101 0101
2 LSB =1 → Prod = Prod + Mcand 11010 10111 0101
Right shift product 11010 11011 1010
3 LSB = 0 → no operation 11010 11011 1010
Right shift product 11010 11101 1101
4 LSB =1 → Prod = Prod – Mcand* 00110 00011 1101
Right shift product 11010 00001 1110
1010two × 1011two = 011110two, i.e., – 6ten × ( – 5ten) = 30ten
*Last iteration with a negative multiplier in 2’s
complement.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 50
Adding Partial Products
y3 y2 y1 y0 multiplicand
x3 x2 x1 x0 multiplier
________________________
x0y3 x0y2 x0y1 x0y0 four
carry←x1y3 x1y2 x1y1 x1y0 partial
carry←x2y3 x2y2 x2y1 x2y0 products
carry← x3y3 x3y2 x3y1 x3y0 to be
__________________________________________________ summed
p7 p6 p5 p4 p3 p2 p1 p0
Requires three 4-bit additions. Slow.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 51
Array Multiplier: Carry Forward
y3 y2 y1 y0 multiplicand
x3 x2 x1 x0 multiplier
________________________
x0y3 x0y2 x0y1 x0y0 four
x1y3 x1y2 x1y1 x1y0 partial
x2y3 x2y2 x2y1 x2y0 products
x3y3 x3y2 x3y1 x3y0 to be
__________________________________________________ summed
p7 p6 p5 p4 p3 p2 p1 p0
Note: Carry is added to the next partial product (carry-save addition).
Adding the carry from the final stage needs an extra (ripple-carry
stage. These additions are faster but we need four stages.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 52
Basic Building Blocks
• Two-input AND
• Full-adder
Full
adder
yi x0
p0i = x0yi
0th
partial
product
sum bit
to (k+1)th
sum
sum bit
from (k-
1)th
sum
yi xk
carry bits
from (k-
1)th
sum
carry bits
to (k+1)th
sum
Slide 24
ith bit of
kth partial
product
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 53
Array Multiplier
y3 y2 y1
y0
x0
x1
x2
x3
FA
xi
yj
ppk
ppk+1
co
0
0
0
ci
0
0 0 0 0
p7 p6 p5 p4 p3 p2 p1 p0
FA FA FA FA
Critical
path 0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 54
Types of Array Multipliers
• Baugh-Wooley Algorithm: Signed product
by two’s complement addition or
subtraction according to the MSB’s.
• Booth multiplier algorithm
• Tree multipliers
• Reference: N. H. E. Weste and D. Harris,
CMOS VLSI Design, A Circuits and
Systems Perspective, Third Edition,
Boston: Addison-Wesley, 2005.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 55
Binary Division (Unsigned)
1 3 Quotient
1 1 / 1 4 7 Divisor /
Dividend
1 1
3 7 Partial
remainder
3 3
4 Remainder
0 0 0 0 1 1 0
1
1 0 1 1 / 1 0 0 1 0 0 1
1
1 0 1 1
0 0 1 1 1 0
1 0 1 1
0 0 1 1 1 1
1 0 1 1
1 0 0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 56
4-bit Binary Division (Unsigned)
Dividend: 6 = 0110
Divisor: 4 = 0100
– 4 = 1100
6
─ = 1, remainder 2
4
0 0 0 1
0 0 0 0 1 1 0
1 1 0 0
1 1 0 0 negative → quotient bit 0
0 1 0 0 → restore remainder
0 0 0 0 1 1 0
1 1 0 0
1 1 0 1 negative → quotient bit 0
0 1 0 0 → restore remainder
0 0 0 1 1 0
1 1 0 0
1 1 1 1 negative → quotient bit 0
0 1 0 0 → restore remainder
0 0 1 1 0
1 1 0 0
0 0 1 0 positive → quotient bit 1
Iteration
4
Iteration
3
Iteration
2
Iteration
1
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 57
32-bit Binary Division Flowchart
$R = 0, $M = Divisor, $Q = Dividend, count = n
Shift 1-bit left $R, $Q
$R ← $R – $M
$R <
0?
$Q0 = 1
$Q0=0
$R ← $R + $M
count = count – 1
count
= 0?
Done
$Q = Quotient
$R =
Remainder
Start
Yes
Yes
No
No
$R and $M have
one extra sign
bit
beyond 32 bits.
Restore $R
(remainder
)
$R (33 b) | $Q (32 b)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 58
4-bit Example: 6/4 = 1, Remainder 2
Actions n $R, $Q $M = Divisor
Initialize 4 0 0 0 0 0 | 0 1 1 0 0 0 1 0 0
Shift left $R, $Q 4 0 0 0 0 0 | 1 1 0 0 0 0 1 0 0
Add – $M (11100) to $R 4 1 1 1 0 0 | 1 1 0 0 0 0 1 0 0
Restore, add $M (00100) to $R 3 0 0 0 0 0 | 1 1 0 0 0 0 1 0 0
Shift left $R, $Q 3 0 0 0 0 1 | 1 0 0 0 0 0 1 0 0
Add – $M (11100) to $R 3 1 1 1 0 1 | 1 0 0 0 0 0 1 0 0
Restore, add $M (00100) to $R 2 0 0 0 0 1 | 1 0 0 0 0 0 1 0 0
Shift left $R, $Q 2 0 0 0 1 1 | 0 0 0 0 0 0 1 0 0
Add – $M (11100) to $R 2 1 1 1 1 1 | 0 0 0 0 0 0 1 0 0
Restore, add $M (00100) to $R 1 0 0 0 1 1 | 0 0 0 0 0 0 1 0 0
Shift left $R, $Q 1 0 0 1 1 0 | 0 0 0 0 0 0 1 0 0
Add – $M (11100) to $R 1 0 0 0 1 0 | 0 0 0 0 0 0 1 0 0
Set LSB of $Q = 1 0 0 0 0 1 0 | 0 0 0 1 0 0 1 0 0
Remainder |
Quotient
count
4
3
2
1
0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 59
Initializ
e
$R←0
Division
33-bit $M
(Divisor)
33-bit $R (Remainder)
33
33
33
33-bit ALU
32
times
Step 1: 1- bit left shift $R and $Q
32-bit $Q
(Dividend)
Step 2: Subtract $R ← $R – $M
Step 3: If sign-bit ($R) = 0, set Q0 = 1
If sign-bit ($R) = 1, set Q0 = 0 and restore $R
V. C. Hamacher, Z. G. Vranesic and S. G. Zaky, Computer Organization, Fourth Edition,
New York: McGraw-Hill, 1996.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 60
Example: 8/3 = 2, Remainder = 2
Initialize $R = 0 0 0 0 0 $Q = 1 0 0 0 $M = 0 0 0 1 1
Step 1, L-shift $R = 0 0 0 0 1 $Q = 0 0 0 0
Step 2, Add – $M = 1 1 1 0 1
$R = 1 1 1 1 0
Step 3, Set Q0 $Q = 0 0 0 0
Restore + $M = 0 0 0 1 1
$R = 0 0 0 0 1
Step 1, L-shift $R = 0 0 0 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 2, Add – $M = 1 1 1 0 1
$R = 1 1 1 1 1
Step 3, Set Q0 $Q = 0 0 0 0
Restore + $M = 0 0 0 1 1
$R = 0 0 0 1 0
Iteration
2
Iteration
1
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 61
Example: 8/3 = 2 (Remainder = 2)
(Continued)
$R = 0 0 0 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 1, L-shift $R = 0 0 1 0 0 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 2, Add – $M = 1 1 1 0 1
$R = 0 0 0 0 1
Step 3, Set Q0 $Q = 0 0 0 1
Step 1, L-shift $R,Q = 0 0 0 1 0 $Q = 0 0 1 0 $M = 0 0 0 1 1
Step 2, Add – $M = 1 1 1 0 1
$R = 1 1 1 1 1
Step 3, Set Q0 $Q = 0 0 1 0 Final quotient
Restore + $M = 0 0 0 1 1
$R = 0 0 0 1 0
Iteration
4
Iteration
3
Note “Restore $R” in Steps 1, 2 and 4. This method is known as
the RESTORING DIVISION. An improved method, NON-RESTORING
DIVISION, is possible (see Hamacher, et al.)
Remainde
r
Non-Restoring Division
• Avoid unnecessary addition (restoration).
• How it works?
• Initially $R contains dividend 2
✕ – n
for n-bit numbers. Example (n = 8):
• In some iteration after left shift, suppose $R = x and divisor is y
• Subtract divisor, $R = x – y
• Restore: If $R is negative, add y, $R = x
• Next step: Left shift, $R = 2x+b, and subtract y, $R = 2x – y + b
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 62
00101101
00000000 00101101
Dividend
$R, $Q
How It Works: Last two Steps
• Suppose we do not restore and go to next step:
• Left shift, $R = 2(x – y) + b = 2x – 2y + b, and add y, then $R = 2x
– 2y + y + b = 2x – y + b (same result as with restoration)
• Non-restoring division
• Initialize and start iterations same as in restoring
division by subtracting divisor
• In any iteration after left shift and subtraction/addition
• If $R is positive, subtract divisor (y) in next iteration
• If $R is negative, add divisor (y) in next iteration
• After final iteration, if $R is negative then restore it by
adding divisor (y)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 63
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 64
Example: 8/3 = 2, Remainder = 2
Non-Restoring Division
Initialize $R = 0 0 0 0 0 $Q = 1 0 0 0 $M = 0 0 0 1 1
Step 1, L-shift $R = 0 0 0 0 1 $Q = 0 0 0 0
Step 2, Add – $M = 1 1 1 0 1
$R = 1 1 1 1 0 $Q = 0 0 0 0
Step 3, Set Q0
Step 1, L-shift $R = 1 1 1 0 0 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 2, Add + $M = 0 0 0 1 1
$R = 1 1 1 1 1 $Q = 0 0 0 0
Step 3, Set Q0
Iteration
2
Iteration
1
Add + $M in next iteration
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 65
Example: 8/3 = 2 (Remainder = 2)
Non-Restoring Division (Continued)
$R = 1 1 1 1 1 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 1, L-shift $R = 1 1 1 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1
Step 2, Add + $M = 0 0 0 1 1
$R = 0 0 0 0 1 $Q = 0 0 0 1
Step 3, Set Q0
Step 1, L-shift $R,Q = 0 0 0 1 0 $Q = 0 0 1 0 $M = 0 0 0 1 1
Step 2, Add – $M = 1 1 1 0 1
$R = 1 1 1 1 1 $Q = 0 0 1 0 Final quotient = 2
Step 3, Set Q0
Restore + $M = 0 0 0 1 1
$R = 0 0 0 1 0
Iteration
4
Iteration
3
See, V. C. Hamacher, Z. G. Vranesic and Z. G. Zaky, Computer
Organization, Fourth Edition, McGraw-Hill, 1996, Section 6.9, pp.
281-285.
Remainder = 2
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 66
Signed Division
• Remember the signs and divide
magnitudes.
• Negate the quotient if the signs of divisor
and dividend disagree.
• There is no other direct division method for
signed division.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 67
Symbol Representation
• Early versions (60s and 70s)
• Six-bit binary code (Control Data Corp., CDC)
• EBCDIC – extended binary coded decimal
interchange code (IBM)
• Presently used –
• ASCII – American standard code for information
interchange – 7 bit code specified by American
National Standards Institute (ANSI), see Table 1.11
on page 63; an eighth MSB is often used as parity
bit to construct a byte-code.
• Unicode – 16 bit code and an extended 32 bit
version
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 68
ASCII
• Each byte pattern represents a character (symbol)
• Convenient to write in hexadecimal, e.g., with even parity,
• 00000000 0ten 00hex null
• 01000001 65ten 41hex A
• 11100001 225ten E1hex a
• Table 1.11 on page 63 gives the 7-bit ASCII code.
• C program – string – terminating with a null byte (odd
parity):
01000101 01000011 01000101 10000000
69ten or 45hex 67ten or 43hex 69ten or 45hex 128ten or 80hex
E C E (null)
Error Detection Code
• Errors: Bits can flip due to noise in circuits
and in communication.
• Extra bits used for error detection.
• Example: a parity bit in ASCII code
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 69
Even parity code for A 01000001
(even number of 1s)
Odd parity code for A 11000001
(odd number of 1s)
7-bit ASCII code
Parity bits
Single-bit error in 7-bit code of “A”, e.g., 1000101, will change
symbol to “E” or 1000000 to “@”. But error will be detected in
the 8-bit code because the error changes the specified parity.
Richard W. Hamming
• Error-correcting codes
(ECC).
• Also known for
• Hamming distance (HD)
= Number of bits two
binary vectors differ in
• Example:
HD(1101, 1010) = 3
• Hamming Medal, 1988
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 70
1915 -1998
The Idea of Hamming Code
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 71
Code space contains 2N
possible N-bit code words:
1010
”A”
1110
”E”
1011
”B”
1000
”8”
0010
”2”
1-bit error in “A”
HD = 1
HD = 1
HD = 1
HD = 1
Error not correctable. Reason: No redundancy.
Hamming’s idea: Increase HD between valid code words.
N = 4
Code Symbol
0000 0
0001 1
0010 2
0011 3
0100 4
0101 5
0110 6
0111 7
1000 8
1001 9
1010 A
1011 B
1100 C
1101 D
1110 E
1111
F
Hamming’s Distance ≥ 3 Code
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 72
1010010
”A”
1-bit error in “A”
shortest distance
decoding eliminates
error
HD = 2
HD = 1
0010101
”2”
1000111
”8”
1011001
”B”
1110100
”E”
HD = 3
HD = 3
HD = 3
HD = 4
0010010
”?”
HD = 3
HD = 4
HD = 4
0011110
”3”
HD = 3
Minimum Distance-3 Hamming Code
Symbol
Original
code
Odd-parity
code
ECC, HD ≥ 3
0 0000 10000 0000000
1 0001 00001 0001011
2 0010 00010 0010101
3 0011 10011 0011110
4 0100 00100 0100110
5 0101 10101 0101101
6 0110 10110 0110011
7 0111 00111 0111000
8 1000 01000 1000111
9 1001 11001 1001100
A 1010 11010 1010010
B 1011 01011 1011001
C 1100 11100 1100001
D 1101 01101 1101010
E 1110 01110 1110100
F 1111 11111 1111111
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 73
Original code: Symbol “0” with a
single-bit error will be Interpreted as
“1”, “2”, “4” or “8”.
Reason: Hamming distance between
codes is 1. A code with any bit error will
map onto another valid code.
Remedy 1: Design codes with HD ≥ 2.
Example: Parity code. Single bit error
detected but not correctable.
Remedy 2: Design codes with HD ≥ 3.
For single bit error correction, decode
as the valid code at HD = 1.
For more error bit detection or
correction, design code with HD ≥ 4.
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 74
Integers and Real Numbers
• Integers: the universe is infinite but discrete
• No fractions
• No numbers between consecutive integers, e.g., 5 and 6
• A countable (finite) number of items in a finite range
• Referred to as fixed-point numbers
• Real numbers – the universe is infinite and continuous
• Fractions represented by decimal notation
• Rational numbers, e.g., 5/2 = 2.5
• Irrational numbers, e.g., 22/7 = 3.14159265 . . .
• Infinite numbers exist even in the smallest range
• Referred to as floating-point numbers
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 75
Wide Range of Numbers
• A large number:
976,000,000,000,000 = 9.76 × 1014
• A small number:
0.0000000000000976 = 9.76 × 10 –14
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 76
Scientific Notation
• Decimal numbers
• 0.513×105
, 5.13×104
and 51.3×103
are written in
scientific notation.
• 5.13×104
is the normalized scientific notation.
• Binary numbers
• Base 2
• Binary point – multiplication by 2 moves the point
to the right.
• Normalized scientific notation, e.g., 1.0two×2 –1
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 77
Floating Point Numbers
• General format
±1.bbbbbtwo×2eeee
or (-1)S
× (1+F) × 2E
• Where
• S = sign, 0 for positive, 1 for negative
• F = fraction (or mantissa) as a binary integer,
1+F is called significand
• E = exponent as a binary integer, positive or
negative (two’s complement)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 78
Binary to Decimal Conversion
Binary (-1)S
(1.b1b2b3b4) × 2E
Decimal (-1)S
× (1 + b1×2-1
+ b2×2-2
+ b3×2-3
+ b4×2-4
) × 2E
Example: -1.1100 × 2-2
(binary) = - (1 + 2-1
+ 2-2
) ×2-2
= - (1 + 0.5 + 0.25)/4
= - 1.75/4
= - 0.4375 (decimal)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 79
William Morton (Velvel) Kahan
1989 Turing Award Citation:
For his fundamental contributions to
numerical analysis. One of the
foremost experts on floating-point
computations. Kahan has dedicated
himself to "making the world safe for
numerical computations."
Architect of the IEEE floating point standard
b. 1933, Canada
Professor of Computer Science, UC-Berkeley
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 80
Negative
Overflow
Positive
Overflow
Expressible
numbers
Numbers in 32-bit Formats
• Two’s complement integers
• Floating point numbers
• Ref: W. Stallings, Computer Organization and Architecture, Sixth
Edition, Upper Saddle River, NJ: Prentice-Hall.
-231
231
-1
0
Expressible
negative
numbers
Expressible
positive
numbers
0
-2-127
2-127
Positive
underflow
Negative underflow
(2 – 2-23
)×2128
- (2 – 2-23
)×2128
Positive zero
Negative zero +
∞
– ∞
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 81
IEEE 754 Floating Point Standard
• Biased exponent: true exponent range
[-126,127] is changed to [1, 254]:
• Biased exponent is an 8-bit positive binary integer.
• True exponent obtained by subtracting 127ten or
01111111two
• First bit of significand is always 1:
± 1.bbbb . . . b × 2E
• 1 before the binary point is implicitly assumed.
• Significand field represents 23 bit fraction after the
binary point.
• Significand range is [1, 2), to be exact [1, 2 – 2-23
]
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 82
Examples
1.1010001 × 210100
= 0 10010011 10100010000000000000000 = 1.6328125 × 220
-1.1010001 × 210100
= 1 10010011 10100010000000000000000 = -1.6328125 × 220
1.1010001 × 2-10100
= 0 01101011 10100010000000000000000 = 1.6328125 × 2-20
-1.1010001 × 2-10100
= 1 01101011 10100010000000000000000 = -1.6328125 × 2-20
Biased exponent (1-254), bias 127 (01111111) to be subtracted
1.0
0.5
0.125
0.007812
5
1.632812
Sign bit
8-bit biased
exponent
107 – 127
= – 20
23-bit Fraction
(F)
of significand
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 83
Example: Conversion to Decimal
• Sign bit is 1, number is negative
• Biased exponent is 27
+20
= 129
• The number is
1 10000001
01000000000000000000000
Sign bit
S
bits 23-
30
bits 0-
22
normalized
E
F
(-1)S
× (1 + F) × 2(exponent – bias)
= (-1)1
× (1 + F) × 2(129 – 127)
= - 1 × 1.25 × 22
= - 1.25 × 4
= - 5.0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 84
Negative
Overflow
Positive
Overflow
IEEE 754 Floating Point Format
• Floating point numbers
Expressible
negative
numbers
Expressible
positive
numbers
0
-2-126
2-126
Positive
underflow
Negative underflow
(2 – 2-23
)×2127
- (2 – 2-23
)×2127
+
∞
– ∞
1 1011001
01001100000000010001101
Sign bit
S
bits 23-
30
bits 0-
22
normalized
E
F
Positive integer – 127 = E
+0
– 0
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 85
Positive Zero in IEEE 754
• + 1.0 × 2 –127
• Smaller than the smallest positive number in
single-precision IEEE 754 standard.
• Interpreted as positive zero.
• True exponent less than –126 is positive
underflow; can be regarded as zero.
0 00000000 00000000000000000000000
Biased
exponent
Fractio
n
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 86
Negative Zero in IEEE 754
• – 1.0 × 2 –127
• Greater than the largest negative number in
single-precision IEEE 754 standard.
• Interpreted as negative zero.
• True exponent less than –126 is negative
underflow; may be regarded as 0.
1 00000000 00000000000000000000000
Biased
exponent
Fractio
n
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 87
Positive Infinity in IEEE 754
• + 1.0 × 2128
• Greater than the largest positive number in
single-precision IEEE 754 standard.
• Interpreted as + ∞
• If true exponent > 127, then the number is
greater than ∞. It is called “not a number” or
NaN and may be interpreted as ∞.
0 11111111 00000000000000000000000
Biased
exponent
Fractio
n
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 88
Negative Infinity in IEEE 754
• –1.0 × 2128
• Smaller than the smallest negative number in
single-precision IEEE 754 standard.
• Interpreted as - ∞
• If true exponent > 127, then the number is less
than - ∞. It is called “not a number” or NaN and
may be interpreted as - ∞.
1 11111111 00000000000000000000000
Biased
exponent
Fractio
n
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 89
Addition and Subtraction
0. Zero check
- Change the sign of subtrahend, i.e., convert to summation
- If either operand is 0, the other is the result
1. Significand alignment: right shift significand of
smaller exponent until two exponents match.
2. Addition: add significands and report error if
overflow occurs. If significand = 0, return result
as 0.
3. Normalization
- Shift significand bits to normalize.
- report overflow or underflow if exponent goes out of range.
4. Rounding
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 90
Example (4 Significant Fraction Bits)
• Subtraction: 0.5ten – 0.4375ten
• Step 0: Floating point numbers to be added
1.000two× 2 –1
and –1.110two× 2 –2
• Step 1: Significand of lesser exponent is
shifted right until exponents match
–1.110two× 2 –2
→ – 0.111two× 2 –1
• Step 2: Add significands, 1.000two + ( –
0.111two)
Result is 0.001two × 2 –1
01000
+1100
1
00001 2’s complement addition, one bit added for
sign
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 91
Example (Continued)
• Step 3: Normalize, 1.000two× 2 – 4
No overflow/underflow since
127 ≥ exponent ≥ –126
• Step 4: Rounding, no change since the sum
fits in 4 bits.
1.000two × 2 – 4
= (1+0)/16 = 0.0625ten
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 92
FP Multiplication: Basic Idea
1. Separate sign
2. Add exponents (integer addition)
3. Multiply significands (integer multiplication)
4. Normalize, round, check overflow/underflow
5. Replace sign
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 93
FP Multiplication: Step 0
Multiply, X × Y
= Z
X =
0?
Y =
0?
Z =
0
Return
Steps 1 -
5
yes
no
yes
no
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 94
FP Multiplication Illustration
• Multiply 0.5ten and – 0.4375ten
(answer = – 0.21875ten) or
• Multiply 1.000two×2 –1
and –1.110two×2 –2
• Step 1: Add exponents
–1 + (–2) = – 3
• Step 2: Multiply significands
1.000
×1.110
0000
1000
1000
1000
1110000 Product is 1.110000
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 95
FP Mult. Illustration (Cont.)
• Step 3:
• Normalization: If necessary, shift significand right and
increment exponent.
Normalized product is 1.110000 × 2 –3
• Check overflow/underflow: 127 ≥ exponent ≥ –126
• Step 4: Rounding: 1.110 × 2 –3
• Step 5: Sign: Operands have opposite signs,
Product is –1.110 × 2 –3
(Decimal value = – (1+0.5+0.25)/8 = – 0.21875ten)
Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 96
FP Division: Basic Idea
• Separate sign.
• Check for zeros and infinity.
• Subtract exponents.
• Divide significands.
• Normalize and detect overflow/underflow.
• Perform rounding.
• Replace sign.

Computer Architecture Binary Arithmetic Lecture.pptx

  • 1.
  • 2.
  • 3.
    Why Binary Arithmetic? 3 3+ 5 0011 + 0101 = 8 = 1000
  • 4.
    4 Why Binary Arithmetic? •Hardware can only deal with binary digits, 0 and 1. • Must represent all numbers, integers or floating point, positive or negative, by binary digits, called bits. • Can devise electronic circuits to perform arithmetic operations: add, subtract, multiply and divide, on binary numbers.
  • 5.
    5 Positive Integers • Decimalsystem: made of 10 digits, {0,1,2, . . . , 9} 41 = 4×101 + 1×100 255 = 2×102 + 5×101 + 5×100 • Binary system: made of two digits, {0,1} 00101001 = 0×27 + 0×26 + 1×25 + 0×24 +1×23 + 0×22 + 0×21 + 1×20 = 32 + 8 +1 = 41 11111111 = 255, largest number with 8 binary digits, 28 -1
  • 6.
    6 Base or Radix •For decimal system, 10 is called the base or radix. • Decimal 41 is also written as 4110 or 41ten • Base (radix) for binary system is 2. • Thus, 41ten = 1010012 or 101001two • Also, 111ten = 1101111two and 111two = 7ten
  • 7.
    7 Signed Magnitude –What Not to Do • Use fixed length binary representation • Use left-most bit (called most significant bit or MSB) for sign: 0 for positive 1 for negative • Example: +18ten = 00010010two –18ten = 10010010two
  • 8.
    8 Difficulties with SignedMagnitude • Sign and magnitude bits should be differently treated in arithmetic operations. • Addition and subtraction require different logic circuits. • Overflow is difficult to detect. • “Zero” has two representations: + 0ten = 00000000two – 0ten = 10000000two • Signed-integers are not used in modern computers.
  • 9.
    Problems with FiniteMath • Finite size of representation: • Digital circuit cannot be arbitrarily large. • Overflow detection – easy to determine when the number becomes too large. • Represent negative numbers: • Unique representation of 0. 9 -4 0 4 8 12 16 20 0000 0100 1000 1100 10000 10100 Infinite universe of integers ∞ -∞ 4-bit numbers
  • 10.
    4-bit Universe Fall 2015,Aug 19 . . . ELEC2200-002 Lecture 2 10 Modulo-16 (4-bit) universe 16/0 8 4 12 0100 1000 1100 0000 15 1111 0 8 4 12 0100 1000 1100 0000 -0 1111 15 -7 7 7 0111 -3 0001 0001 Only 16 integers: 0 through 15, or – 7 through 7
  • 11.
    One Way toDivide Universe 1’s Complement Numbers 11 0 8 4 12 0100 1000 1100 0000 -0 1111 15 -7 7 0111 -3 0001 Decimal magnitude Binary number Positive Negative 0 0000 1111 1 0001 1110 2 0010 1101 3 0011 1100 4 0100 1011 5 0101 1010 6 0110 1001 7 0111 1000 Negation rule: invert bits. Problem: 0 ≠ – 0
  • 12.
    Another Way toDivide Universe 2’s Complement Numbers 12 0 8 4 12 0100 1000 1100 0000 -1 1111 15 -8 7 0111 -4 0001 Decimal magnitude Binary number Positive Negative 0 0000 1 0001 1111 2 0010 1110 3 0011 1101 4 0100 1100 5 0101 1011 6 0110 1010 7 0111 1001 8 1000 Negation rule: invert bits and add 1 Subtract 1 on this side
  • 13.
    13 Integers With Sign– Two Ways • Use fixed-length representation, but no explicit sign bit: • 1’s complement: To form a negative number, complement each bit in the given number. • 2’s complement: To form a negative number, start with the given number, subtract one, and then complement each bit, or first complement each bit, and then add 1. • 2’s complement is the preferred representation.
  • 14.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 14 2’s-Complement Integers • Why not 1’s-complement? Don’t like two zeros. • Negation rule: • Subtract 1 and then invert bits, or • Invert bits and add 1 • Some properties: • Only one representation for 0 • Exactly as many positive numbers as negative numbers • Slight asymmetry – there is one negative number with no positive counterpart
  • 15.
    General Method forBinary Integers with Sign • Select number (n) of bits in representation. • Partition 2n integers into two sets: • 00…0 through 01…1 are 2n /2 positive integers. • 10…0 through 11…1 are 2n /2 negative integers. • Negation rule transforms negative to positive, and vice- versa: • Signed magnitude: invert MSB (most significant bit) • 1’s complement: Subtract from 2n – 1 or 1…1 (same as “inverting all bits”) • 2’s complement: Subtract from 2n or 10…0 (same as 1’s complement + 1) 15
  • 16.
    Three Systems (n= 4) 16 0000 1000 0111 1111 1010 = – 2 Signed magnitude 0000 1000 1111 1010 = – 5 1’s complement integers 0010 1010 1010 0111 2 – 2 6 – 5 0000 1000 1111 10000 1010 = – 6 2’s complement integers 1010 0111 6 – 6 0 – 0 0 – 7 – 8 7 7 0 – 0 7 – 7 – 1
  • 17.
    17 Three Representations Sign-magnitude 000 =+0 001 = +1 010 = +2 011 = +3 100 = - 0 101 = - 1 110 = - 2 111 = - 3 2’s complement 000 = +0 001 = +1 010 = +2 011 = +3 100 = - 4 101 = - 3 110 = - 2 111 = - 1 (Preferred) 1’s complement 000 = +0 001 = +1 010 = +2 011 = +3 100 = - 3 101 = - 2 110 = - 1 111 = - 0
  • 18.
    18 2’s Complement Numbers(n = 3) 0 + 1 + 2 + 3 - 1 - 2 - 3 - 4 000 001 010 011 100 101 110 111 addition subtraction P o s i t i v e n u m b e r s N e g a t i v e n u m b e r s Overflow Negation
  • 19.
    19 2’s Complement n-bitNumbers • Range: – 2n –1 through 2n –1 – 1 • Unique zero: 00000000 . . . . . 0 • Negation rule: see slide 11 or 13. • Expansion of bit length: stretch the left-most bit all the way, e.g., 11111101 is still 101 or – 3. Also, 00000011 is same as 011 or 3. • Most significant bit (MSB) indicates sign. • Overflow rule: If two numbers with the same sign bit (both positive or both negative) are added, the overflow occurs if and only if the result has the opposite sign. • Subtraction rule: for A – B, add – B and A.
  • 20.
    Summary • For agiven number (n) of digits we have a finite set of integers. For example, there are 103 = 1,000 decimal integers and 23 = 8 binary integers in 3-digit representations. • We divide the finite set of integers [0, rn – 1], where radix r = 10 or 2, into two equal parts representing positive and negative numbers. • Positive and negative numbers of equal magnitudes are complements of each other: x + complement (x) = 0. 20
  • 21.
    Summary: Defining Complement •Decimal integers: • 10’s complement: – x = Complement (x) = 10n – x • 9’s complement: – x = Complement (x) = 10n – 1 – x • For 9’s complement, subtract each digit from 9 • For 10’s complement, add 1 to 9’s complement • Binary integers: • 2’s complement: – x = Complement (x) = 2n – x • 1’s complement: – x = Complement (x) = 2n – 1 – x • For 1’s complement, subtract each digit from 1 • For 2’s complement, add 1 to 1’s complement 21
  • 22.
    Understanding Complement • Complementmeans “something that completes”: e.g., X + complement (X) = “Whole”. • Complement also means “opposite”, e.g., complementary colors are placed opposite in the primary color chart. • Complementary numbers are like electric charges. Positive and negative charges of equal magnitudes annihilate each other. 22
  • 23.
    2’s-Complement Numbers 23 . .. -1 0 1 2 3 4 5 . . . 000 001 010 011 100 101 Infinite universe of integers ∞ -∞ 000 499 500 1000 001 999 501 Finite Universe of 3-digit Decimal numbers 000 011 100 1000 001 111 101 Finite Universe of 3-bit binary numbers
  • 24.
    Examples of Complements •Decimal integers (r = 10, n = 3): • 10’s complement: – 50 = Compl (50) = 103 – 50 = 950; 50 + 950 = 1,000 = 0 (in 3 digit representation) • 9’s complement: – 50 = Compl (50) = 10n – 1 – 50 = 949; 50 + 949 = 999 = – 0 (in 9’s complement rep.) • Binary integers (r = 2, n = 4): • 2’s complement: – 5 = Complement (5) = 24 – 5 = 1110 or 1011; 5 + 11 = 16 = 0 (in 4-bit representation) • 1’s complement: – 5 = Complement (5) = 24 – 1 – 5 = 1010 or 1010; 5 + 10 = 15 = – 0 (in 1’s complement representation) 24
  • 25.
    25 2’s-Complement to Decimal Conversion bn-1bn-2 . . . b1 b0 = – 2n-1 bn-1 + Σ 2i bi i= 0 n- 2 -128 64 32 16 8 4 2 1 8-bit conversion box -128 64 32 16 8 4 2 1 1 1 1 1 1 1 0 1 Example – 128 + 64 + 32 + 16 + 8 + 4 + 1 = – 128 + 125 = – 3
  • 26.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 26 For More on 2’s-Complement • Chapter 4 in D. E. Knuth, The Art of Computer Programming: Seminumerical Algorithms, Volume II, Second Edition, Addison-Wesley, 1981. • A. al’Khwarizmi, Hisab al-jabr w’al-muqabala, 830. • Read: A two part interview with D. E. Knuth, Communications of the ACM (CACM), vol. 51, no. 7, pp. 35-39 (July), and no. 8, pp. 31-35 (August), 2008. Donald E. Knuth (1938 - ) Abu Abd-Allah ibn Musa al’Khwarizmi (~780 – 850)
  • 27.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 27 Addition • Adding bits: • 0 + 0 = 0 • 0 + 1 = 1 • 1 + 0 = 1 • 1 + 1 = (1) 0 • Adding integers: carry 0 0 0 . . . . . . 0 1 1 1 two = 7ten + 0 0 0 . . . . . . 0 1 1 0 two = 6ten = 0 0 0 . . . . . . 1 (1)1 (1)0 (0)1 two = 13ten 1 1 0
  • 28.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 28 Subtraction • Direct subtraction • Two’s complement subtraction by adding 0 0 0 . . . . . . 0 1 1 1 two = 7ten – 0 0 0 . . . . . . 0 1 1 0 two = 6ten = 0 0 0 . . . . . . 0 0 0 1two = 1ten 0 0 0 . . . . . . 0 1 1 1 two = 7ten + 1 1 1 . . . . . . 1 0 1 0 two = – 6ten = 0 0 0 . . . . . . 0 (1) 0 (1) 0 (0)1 two = 1ten 1 1 1 . . . . . . 1 1 0
  • 29.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 29 Overflow: An Error • Examples: Addition of 3-bit integers (range - 4 to +3) • -2-3 = -5 110 = -2 + 101 = -3 = 1011 = 3 (error) • 3+2 = 5 011 = 3 010 = 2 = 101 = -3 (error) • Overflow rule: If two numbers with the same sign bit (both positive or both negative) are added, the overflow occurs if and only if the result has the opposite sign. 0 1 2 3 -1 - 2 - 3 - 4 000 001 010 011 100 101 110 111 – + Overflow crossing
  • 30.
    Overflow and FiniteUniverse Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 30 . . .1111 0000 0001 0010 0011 0100 0101 . . . Decrease Increase Infinite universe of integers No overflow ∞ -∞ 0000 Forbidden fence 1000 0001 1111 1001 Finite Universe of 4-bit binary integers 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 Increase Decrease
  • 31.
    Adding Two Bits ab s = a + b Decimal Binary 0 0 0 00 0 1 1 01 1 0 1 01 1 1 2 10 Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 31 SUM CARRY
  • 32.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 32 HA Half-Adder Adds two Bits “half” because it has no carry input • Adding two bits: a b a + b 0 0 00 0 1 01 1 0 01 1 1 10 carry sum a b sum carry XOR AND
  • 33.
    Full Adder: IncludeCarry Input a b c s = a + b + c Decimal value Binary value 0 0 0 0 00 0 0 1 1 01 0 1 0 1 01 0 1 1 2 10 1 0 0 1 01 1 0 1 2 10 1 1 0 2 10 1 1 1 3 11 Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 33 SUM CARRY
  • 34.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 34 Full-Adder Adds Three Bits a b XOR AND XOR AND OR c sum carry FA HA HA
  • 35.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 35 32-bit Ripple-Carry Adder FA0 FA1 FA2 FA31 a0 b0 c0 = 0 a1 b1 a2 b2 a31 b31 s0 s1 s2 c32 (discard) s31 c31 c2 c1 c32 c31 . . . c2 c1 0 a31 . . . a2 a1 a0 + b31 . . . b2 b1 b0 s31 . . . s2 s1 s0
  • 36.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 36 How Fast is Ripple-Carry Adder? • Longest delay path (critical path) runs from (a0, b0) to sum31. • Suppose delay of full-adder is 100ps. • Critical path delay = 3,200ps • Clock rate cannot be higher than 1/(3,200×10 –12 ) Hz = 312MHz. • Must use more efficient ways to handle carry.
  • 37.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 37 Speeding Up the Adder 16-bit ripple carry adder a0- a15 b0- b15 c0 = 0 s0-s15 16-bit ripple carry adder a16- a31 b16-b31 0 16-bit ripple carry adder a16- a31 b16-b31 1 Multiplexe r s16-s31 0 1 This is a carry-select adder
  • 38.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 38 Fast Adders • In general, any output of a 32-bit adder can be evaluated as a logic expression in terms of all 65 inputs. • Number of levels of logic can be reduced to log2N for N-bit adder. Ripple-carry has N levels. • More gates are needed, about log2N times that of ripple-carry design. • Fastest design is known as carry lookahead adder.
  • 39.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 39 N-bit Adder Design Options Type of adder Time complexity (delay) Space complexity (size) Ripple-carry O(N) O(N) Carry-lookahead O(log2N) O(N log2N) Carry-skip O(√N) O(N) Carry-select O(√N) O(N) Reference: J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, Second Edition, San Francisco, California, 1990, page A-46.
  • 40.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 40 Binary Multiplication (Unsigned) 1 0 0 0 two = 8ten multiplicand 1 0 0 1 two = 9ten multiplier ____________ 1 0 0 0 0 0 0 0 partial products 0 0 0 0 1 0 0 0 ____________ 1 0 0 1 0 0 0two = 72ten Basic algorithm: For n = 1, 32, only If nth bit of multiplier is 1, then add multiplicand × 2 n –1 to product
  • 41.
    Digital Circuits forMultiplication • Need: • Three registers for multiplicand, multiplier and product. • Adder or arithmetic logic unit (ALU). • What is a register • A memory device – unit cell stores one bit. • A 32-bit register has 32 storage cells. It can store a 32-bit integer. Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 41 bit 0 bit 32 1 bit right shift divides integer by 2 1 bit left shift multiplies integer by 2
  • 42.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 42 LSB of multipli er ? Multiplication Flowchart Initialize product register to 0 Partial product number, n = 1 Left shift multiplicand register 1 bit Right shift multiplier register 1 bit n = ? n = n + 1 Done Star t Add multiplicand to product and place result in product register 1 0 n < 32 n = 32 N = 32
  • 43.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 43 Serial Multiplication 64-bit product register, initially 0 64 64 64 64-bit ALU Test LSB N = 32 times shift right 32-bit multiplier shift left write 3 operations per bit: shift right shift left add Need 64-bit ALU Multiplicand (expanded 64- bits) LSB = 0 LSB = 1 add Shift l/r LSB after add N = 32 after add
  • 44.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 44 Serial Multiplication (Improved) Multiplicand 64-bit product register 32 32 32 32-bit ALU Test LSB 32 times LSB (3) shift right 00000 . . . 00000 32-bit multiplier Initialized product register (2) w rite 2 operations per bit: shift right add 32-bit ALU 1 1 (1) add 1 or 0 N = 32
  • 45.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 45 Example: 0010two× 0011two Iteration Step Multiplicand Product 0 Initial values 0010 0000 0011 1 LSB =1 → Prod = Prod + Mcand 0010 0010 0011 Right shift product 0010 0001 0001 2 LSB =1 → Prod = Prod + Mcand 0010 0011 0001 Right shift product 0010 0001 1000 3 LSB = 0 → no operation 0010 0001 1000 Right shift product 0010 0000 1100 4 LSB = 0 → no operation 0010 0000 1100 Right shift product 0010 0000 0110 0010two × 0011two = 0110two, i.e., 2ten × 3ten = 6ten
  • 46.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 46 Multiplying with Signs • Convert numbers to magnitudes. • Multiply the two magnitudes through 32 iterations. • Negate the result if the signs of the multiplicand and multiplier differed. • Alternatively, the previous algorithm will work with some modifications. See B. Parhami, Computer Architecture, New York: Oxford University Press, 2005, pp. 199-200.
  • 47.
    Alternative Method withSigns • In the improved method: • Use 2N + 1 bit product register • Use N + 1 bit multiplicand register • Use N + 1 bit adder • Proceed as in the improved method, except – • In the last (Nth) iteration, if LSB = 1, subtract multiplicand instead of adding. Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 47
  • 48.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 48 Example 1: 1010two× 0011two Iteration Step Multiplicand Product 0 Initial values 11010 00000 0011 1 LSB = 1 → Prod = Prod + Mcand 11010 11010 0011 Right shift product 11010 11101 0001 2 LSB = 1 → Prod = Prod + Mcand 11010 10111 0001 Right shift product 11010 11011 1000 3 LSB = 0 → no operation 11010 11011 1000 Right shift product 11010 11101 1100 4 LSB = 0 → no operation 11010 11101 1100 Right shift product 11010 11110 1110 1010two × 0011two = 101110two, i.e., – 6ten × 3ten = – 18ten
  • 49.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 49 Example 2: 1010two× 1011two Iteration Step Multiplicand Product 0 Initial values 11010 00000 1011 1 LSB =1 → Prod = Prod + Mcand 11010 11010 1011 Right shift product 11010 11101 0101 2 LSB =1 → Prod = Prod + Mcand 11010 10111 0101 Right shift product 11010 11011 1010 3 LSB = 0 → no operation 11010 11011 1010 Right shift product 11010 11101 1101 4 LSB =1 → Prod = Prod – Mcand* 00110 00011 1101 Right shift product 11010 00001 1110 1010two × 1011two = 011110two, i.e., – 6ten × ( – 5ten) = 30ten *Last iteration with a negative multiplier in 2’s complement.
  • 50.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 50 Adding Partial Products y3 y2 y1 y0 multiplicand x3 x2 x1 x0 multiplier ________________________ x0y3 x0y2 x0y1 x0y0 four carry←x1y3 x1y2 x1y1 x1y0 partial carry←x2y3 x2y2 x2y1 x2y0 products carry← x3y3 x3y2 x3y1 x3y0 to be __________________________________________________ summed p7 p6 p5 p4 p3 p2 p1 p0 Requires three 4-bit additions. Slow.
  • 51.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 51 Array Multiplier: Carry Forward y3 y2 y1 y0 multiplicand x3 x2 x1 x0 multiplier ________________________ x0y3 x0y2 x0y1 x0y0 four x1y3 x1y2 x1y1 x1y0 partial x2y3 x2y2 x2y1 x2y0 products x3y3 x3y2 x3y1 x3y0 to be __________________________________________________ summed p7 p6 p5 p4 p3 p2 p1 p0 Note: Carry is added to the next partial product (carry-save addition). Adding the carry from the final stage needs an extra (ripple-carry stage. These additions are faster but we need four stages.
  • 52.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 52 Basic Building Blocks • Two-input AND • Full-adder Full adder yi x0 p0i = x0yi 0th partial product sum bit to (k+1)th sum sum bit from (k- 1)th sum yi xk carry bits from (k- 1)th sum carry bits to (k+1)th sum Slide 24 ith bit of kth partial product
  • 53.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 53 Array Multiplier y3 y2 y1 y0 x0 x1 x2 x3 FA xi yj ppk ppk+1 co 0 0 0 ci 0 0 0 0 0 p7 p6 p5 p4 p3 p2 p1 p0 FA FA FA FA Critical path 0
  • 54.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 54 Types of Array Multipliers • Baugh-Wooley Algorithm: Signed product by two’s complement addition or subtraction according to the MSB’s. • Booth multiplier algorithm • Tree multipliers • Reference: N. H. E. Weste and D. Harris, CMOS VLSI Design, A Circuits and Systems Perspective, Third Edition, Boston: Addison-Wesley, 2005.
  • 55.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 55 Binary Division (Unsigned) 1 3 Quotient 1 1 / 1 4 7 Divisor / Dividend 1 1 3 7 Partial remainder 3 3 4 Remainder 0 0 0 0 1 1 0 1 1 0 1 1 / 1 0 0 1 0 0 1 1 1 0 1 1 0 0 1 1 1 0 1 0 1 1 0 0 1 1 1 1 1 0 1 1 1 0 0
  • 56.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 56 4-bit Binary Division (Unsigned) Dividend: 6 = 0110 Divisor: 4 = 0100 – 4 = 1100 6 ─ = 1, remainder 2 4 0 0 0 1 0 0 0 0 1 1 0 1 1 0 0 1 1 0 0 negative → quotient bit 0 0 1 0 0 → restore remainder 0 0 0 0 1 1 0 1 1 0 0 1 1 0 1 negative → quotient bit 0 0 1 0 0 → restore remainder 0 0 0 1 1 0 1 1 0 0 1 1 1 1 negative → quotient bit 0 0 1 0 0 → restore remainder 0 0 1 1 0 1 1 0 0 0 0 1 0 positive → quotient bit 1 Iteration 4 Iteration 3 Iteration 2 Iteration 1
  • 57.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 57 32-bit Binary Division Flowchart $R = 0, $M = Divisor, $Q = Dividend, count = n Shift 1-bit left $R, $Q $R ← $R – $M $R < 0? $Q0 = 1 $Q0=0 $R ← $R + $M count = count – 1 count = 0? Done $Q = Quotient $R = Remainder Start Yes Yes No No $R and $M have one extra sign bit beyond 32 bits. Restore $R (remainder ) $R (33 b) | $Q (32 b)
  • 58.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 58 4-bit Example: 6/4 = 1, Remainder 2 Actions n $R, $Q $M = Divisor Initialize 4 0 0 0 0 0 | 0 1 1 0 0 0 1 0 0 Shift left $R, $Q 4 0 0 0 0 0 | 1 1 0 0 0 0 1 0 0 Add – $M (11100) to $R 4 1 1 1 0 0 | 1 1 0 0 0 0 1 0 0 Restore, add $M (00100) to $R 3 0 0 0 0 0 | 1 1 0 0 0 0 1 0 0 Shift left $R, $Q 3 0 0 0 0 1 | 1 0 0 0 0 0 1 0 0 Add – $M (11100) to $R 3 1 1 1 0 1 | 1 0 0 0 0 0 1 0 0 Restore, add $M (00100) to $R 2 0 0 0 0 1 | 1 0 0 0 0 0 1 0 0 Shift left $R, $Q 2 0 0 0 1 1 | 0 0 0 0 0 0 1 0 0 Add – $M (11100) to $R 2 1 1 1 1 1 | 0 0 0 0 0 0 1 0 0 Restore, add $M (00100) to $R 1 0 0 0 1 1 | 0 0 0 0 0 0 1 0 0 Shift left $R, $Q 1 0 0 1 1 0 | 0 0 0 0 0 0 1 0 0 Add – $M (11100) to $R 1 0 0 0 1 0 | 0 0 0 0 0 0 1 0 0 Set LSB of $Q = 1 0 0 0 0 1 0 | 0 0 0 1 0 0 1 0 0 Remainder | Quotient count 4 3 2 1 0
  • 59.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 59 Initializ e $R←0 Division 33-bit $M (Divisor) 33-bit $R (Remainder) 33 33 33 33-bit ALU 32 times Step 1: 1- bit left shift $R and $Q 32-bit $Q (Dividend) Step 2: Subtract $R ← $R – $M Step 3: If sign-bit ($R) = 0, set Q0 = 1 If sign-bit ($R) = 1, set Q0 = 0 and restore $R V. C. Hamacher, Z. G. Vranesic and S. G. Zaky, Computer Organization, Fourth Edition, New York: McGraw-Hill, 1996.
  • 60.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 60 Example: 8/3 = 2, Remainder = 2 Initialize $R = 0 0 0 0 0 $Q = 1 0 0 0 $M = 0 0 0 1 1 Step 1, L-shift $R = 0 0 0 0 1 $Q = 0 0 0 0 Step 2, Add – $M = 1 1 1 0 1 $R = 1 1 1 1 0 Step 3, Set Q0 $Q = 0 0 0 0 Restore + $M = 0 0 0 1 1 $R = 0 0 0 0 1 Step 1, L-shift $R = 0 0 0 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 2, Add – $M = 1 1 1 0 1 $R = 1 1 1 1 1 Step 3, Set Q0 $Q = 0 0 0 0 Restore + $M = 0 0 0 1 1 $R = 0 0 0 1 0 Iteration 2 Iteration 1
  • 61.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 61 Example: 8/3 = 2 (Remainder = 2) (Continued) $R = 0 0 0 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 1, L-shift $R = 0 0 1 0 0 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 2, Add – $M = 1 1 1 0 1 $R = 0 0 0 0 1 Step 3, Set Q0 $Q = 0 0 0 1 Step 1, L-shift $R,Q = 0 0 0 1 0 $Q = 0 0 1 0 $M = 0 0 0 1 1 Step 2, Add – $M = 1 1 1 0 1 $R = 1 1 1 1 1 Step 3, Set Q0 $Q = 0 0 1 0 Final quotient Restore + $M = 0 0 0 1 1 $R = 0 0 0 1 0 Iteration 4 Iteration 3 Note “Restore $R” in Steps 1, 2 and 4. This method is known as the RESTORING DIVISION. An improved method, NON-RESTORING DIVISION, is possible (see Hamacher, et al.) Remainde r
  • 62.
    Non-Restoring Division • Avoidunnecessary addition (restoration). • How it works? • Initially $R contains dividend 2 ✕ – n for n-bit numbers. Example (n = 8): • In some iteration after left shift, suppose $R = x and divisor is y • Subtract divisor, $R = x – y • Restore: If $R is negative, add y, $R = x • Next step: Left shift, $R = 2x+b, and subtract y, $R = 2x – y + b Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 62 00101101 00000000 00101101 Dividend $R, $Q
  • 63.
    How It Works:Last two Steps • Suppose we do not restore and go to next step: • Left shift, $R = 2(x – y) + b = 2x – 2y + b, and add y, then $R = 2x – 2y + y + b = 2x – y + b (same result as with restoration) • Non-restoring division • Initialize and start iterations same as in restoring division by subtracting divisor • In any iteration after left shift and subtraction/addition • If $R is positive, subtract divisor (y) in next iteration • If $R is negative, add divisor (y) in next iteration • After final iteration, if $R is negative then restore it by adding divisor (y) Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 63
  • 64.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 64 Example: 8/3 = 2, Remainder = 2 Non-Restoring Division Initialize $R = 0 0 0 0 0 $Q = 1 0 0 0 $M = 0 0 0 1 1 Step 1, L-shift $R = 0 0 0 0 1 $Q = 0 0 0 0 Step 2, Add – $M = 1 1 1 0 1 $R = 1 1 1 1 0 $Q = 0 0 0 0 Step 3, Set Q0 Step 1, L-shift $R = 1 1 1 0 0 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 2, Add + $M = 0 0 0 1 1 $R = 1 1 1 1 1 $Q = 0 0 0 0 Step 3, Set Q0 Iteration 2 Iteration 1 Add + $M in next iteration
  • 65.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 65 Example: 8/3 = 2 (Remainder = 2) Non-Restoring Division (Continued) $R = 1 1 1 1 1 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 1, L-shift $R = 1 1 1 1 0 $Q = 0 0 0 0 $M = 0 0 0 1 1 Step 2, Add + $M = 0 0 0 1 1 $R = 0 0 0 0 1 $Q = 0 0 0 1 Step 3, Set Q0 Step 1, L-shift $R,Q = 0 0 0 1 0 $Q = 0 0 1 0 $M = 0 0 0 1 1 Step 2, Add – $M = 1 1 1 0 1 $R = 1 1 1 1 1 $Q = 0 0 1 0 Final quotient = 2 Step 3, Set Q0 Restore + $M = 0 0 0 1 1 $R = 0 0 0 1 0 Iteration 4 Iteration 3 See, V. C. Hamacher, Z. G. Vranesic and Z. G. Zaky, Computer Organization, Fourth Edition, McGraw-Hill, 1996, Section 6.9, pp. 281-285. Remainder = 2
  • 66.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 66 Signed Division • Remember the signs and divide magnitudes. • Negate the quotient if the signs of divisor and dividend disagree. • There is no other direct division method for signed division.
  • 67.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 67 Symbol Representation • Early versions (60s and 70s) • Six-bit binary code (Control Data Corp., CDC) • EBCDIC – extended binary coded decimal interchange code (IBM) • Presently used – • ASCII – American standard code for information interchange – 7 bit code specified by American National Standards Institute (ANSI), see Table 1.11 on page 63; an eighth MSB is often used as parity bit to construct a byte-code. • Unicode – 16 bit code and an extended 32 bit version
  • 68.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 68 ASCII • Each byte pattern represents a character (symbol) • Convenient to write in hexadecimal, e.g., with even parity, • 00000000 0ten 00hex null • 01000001 65ten 41hex A • 11100001 225ten E1hex a • Table 1.11 on page 63 gives the 7-bit ASCII code. • C program – string – terminating with a null byte (odd parity): 01000101 01000011 01000101 10000000 69ten or 45hex 67ten or 43hex 69ten or 45hex 128ten or 80hex E C E (null)
  • 69.
    Error Detection Code •Errors: Bits can flip due to noise in circuits and in communication. • Extra bits used for error detection. • Example: a parity bit in ASCII code Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 69 Even parity code for A 01000001 (even number of 1s) Odd parity code for A 11000001 (odd number of 1s) 7-bit ASCII code Parity bits Single-bit error in 7-bit code of “A”, e.g., 1000101, will change symbol to “E” or 1000000 to “@”. But error will be detected in the 8-bit code because the error changes the specified parity.
  • 70.
    Richard W. Hamming •Error-correcting codes (ECC). • Also known for • Hamming distance (HD) = Number of bits two binary vectors differ in • Example: HD(1101, 1010) = 3 • Hamming Medal, 1988 Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 70 1915 -1998
  • 71.
    The Idea ofHamming Code Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 71 Code space contains 2N possible N-bit code words: 1010 ”A” 1110 ”E” 1011 ”B” 1000 ”8” 0010 ”2” 1-bit error in “A” HD = 1 HD = 1 HD = 1 HD = 1 Error not correctable. Reason: No redundancy. Hamming’s idea: Increase HD between valid code words. N = 4 Code Symbol 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 9 1010 A 1011 B 1100 C 1101 D 1110 E 1111 F
  • 72.
    Hamming’s Distance ≥3 Code Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 72 1010010 ”A” 1-bit error in “A” shortest distance decoding eliminates error HD = 2 HD = 1 0010101 ”2” 1000111 ”8” 1011001 ”B” 1110100 ”E” HD = 3 HD = 3 HD = 3 HD = 4 0010010 ”?” HD = 3 HD = 4 HD = 4 0011110 ”3” HD = 3
  • 73.
    Minimum Distance-3 HammingCode Symbol Original code Odd-parity code ECC, HD ≥ 3 0 0000 10000 0000000 1 0001 00001 0001011 2 0010 00010 0010101 3 0011 10011 0011110 4 0100 00100 0100110 5 0101 10101 0101101 6 0110 10110 0110011 7 0111 00111 0111000 8 1000 01000 1000111 9 1001 11001 1001100 A 1010 11010 1010010 B 1011 01011 1011001 C 1100 11100 1100001 D 1101 01101 1101010 E 1110 01110 1110100 F 1111 11111 1111111 Fall 2015, Aug 19 . . . ELEC2200-002 Lecture 2 73 Original code: Symbol “0” with a single-bit error will be Interpreted as “1”, “2”, “4” or “8”. Reason: Hamming distance between codes is 1. A code with any bit error will map onto another valid code. Remedy 1: Design codes with HD ≥ 2. Example: Parity code. Single bit error detected but not correctable. Remedy 2: Design codes with HD ≥ 3. For single bit error correction, decode as the valid code at HD = 1. For more error bit detection or correction, design code with HD ≥ 4.
  • 74.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 74 Integers and Real Numbers • Integers: the universe is infinite but discrete • No fractions • No numbers between consecutive integers, e.g., 5 and 6 • A countable (finite) number of items in a finite range • Referred to as fixed-point numbers • Real numbers – the universe is infinite and continuous • Fractions represented by decimal notation • Rational numbers, e.g., 5/2 = 2.5 • Irrational numbers, e.g., 22/7 = 3.14159265 . . . • Infinite numbers exist even in the smallest range • Referred to as floating-point numbers
  • 75.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 75 Wide Range of Numbers • A large number: 976,000,000,000,000 = 9.76 × 1014 • A small number: 0.0000000000000976 = 9.76 × 10 –14
  • 76.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 76 Scientific Notation • Decimal numbers • 0.513×105 , 5.13×104 and 51.3×103 are written in scientific notation. • 5.13×104 is the normalized scientific notation. • Binary numbers • Base 2 • Binary point – multiplication by 2 moves the point to the right. • Normalized scientific notation, e.g., 1.0two×2 –1
  • 77.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 77 Floating Point Numbers • General format ±1.bbbbbtwo×2eeee or (-1)S × (1+F) × 2E • Where • S = sign, 0 for positive, 1 for negative • F = fraction (or mantissa) as a binary integer, 1+F is called significand • E = exponent as a binary integer, positive or negative (two’s complement)
  • 78.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 78 Binary to Decimal Conversion Binary (-1)S (1.b1b2b3b4) × 2E Decimal (-1)S × (1 + b1×2-1 + b2×2-2 + b3×2-3 + b4×2-4 ) × 2E Example: -1.1100 × 2-2 (binary) = - (1 + 2-1 + 2-2 ) ×2-2 = - (1 + 0.5 + 0.25)/4 = - 1.75/4 = - 0.4375 (decimal)
  • 79.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 79 William Morton (Velvel) Kahan 1989 Turing Award Citation: For his fundamental contributions to numerical analysis. One of the foremost experts on floating-point computations. Kahan has dedicated himself to "making the world safe for numerical computations." Architect of the IEEE floating point standard b. 1933, Canada Professor of Computer Science, UC-Berkeley
  • 80.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 80 Negative Overflow Positive Overflow Expressible numbers Numbers in 32-bit Formats • Two’s complement integers • Floating point numbers • Ref: W. Stallings, Computer Organization and Architecture, Sixth Edition, Upper Saddle River, NJ: Prentice-Hall. -231 231 -1 0 Expressible negative numbers Expressible positive numbers 0 -2-127 2-127 Positive underflow Negative underflow (2 – 2-23 )×2128 - (2 – 2-23 )×2128 Positive zero Negative zero + ∞ – ∞
  • 81.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 81 IEEE 754 Floating Point Standard • Biased exponent: true exponent range [-126,127] is changed to [1, 254]: • Biased exponent is an 8-bit positive binary integer. • True exponent obtained by subtracting 127ten or 01111111two • First bit of significand is always 1: ± 1.bbbb . . . b × 2E • 1 before the binary point is implicitly assumed. • Significand field represents 23 bit fraction after the binary point. • Significand range is [1, 2), to be exact [1, 2 – 2-23 ]
  • 82.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 82 Examples 1.1010001 × 210100 = 0 10010011 10100010000000000000000 = 1.6328125 × 220 -1.1010001 × 210100 = 1 10010011 10100010000000000000000 = -1.6328125 × 220 1.1010001 × 2-10100 = 0 01101011 10100010000000000000000 = 1.6328125 × 2-20 -1.1010001 × 2-10100 = 1 01101011 10100010000000000000000 = -1.6328125 × 2-20 Biased exponent (1-254), bias 127 (01111111) to be subtracted 1.0 0.5 0.125 0.007812 5 1.632812 Sign bit 8-bit biased exponent 107 – 127 = – 20 23-bit Fraction (F) of significand
  • 83.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 83 Example: Conversion to Decimal • Sign bit is 1, number is negative • Biased exponent is 27 +20 = 129 • The number is 1 10000001 01000000000000000000000 Sign bit S bits 23- 30 bits 0- 22 normalized E F (-1)S × (1 + F) × 2(exponent – bias) = (-1)1 × (1 + F) × 2(129 – 127) = - 1 × 1.25 × 22 = - 1.25 × 4 = - 5.0
  • 84.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 84 Negative Overflow Positive Overflow IEEE 754 Floating Point Format • Floating point numbers Expressible negative numbers Expressible positive numbers 0 -2-126 2-126 Positive underflow Negative underflow (2 – 2-23 )×2127 - (2 – 2-23 )×2127 + ∞ – ∞ 1 1011001 01001100000000010001101 Sign bit S bits 23- 30 bits 0- 22 normalized E F Positive integer – 127 = E +0 – 0
  • 85.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 85 Positive Zero in IEEE 754 • + 1.0 × 2 –127 • Smaller than the smallest positive number in single-precision IEEE 754 standard. • Interpreted as positive zero. • True exponent less than –126 is positive underflow; can be regarded as zero. 0 00000000 00000000000000000000000 Biased exponent Fractio n
  • 86.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 86 Negative Zero in IEEE 754 • – 1.0 × 2 –127 • Greater than the largest negative number in single-precision IEEE 754 standard. • Interpreted as negative zero. • True exponent less than –126 is negative underflow; may be regarded as 0. 1 00000000 00000000000000000000000 Biased exponent Fractio n
  • 87.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 87 Positive Infinity in IEEE 754 • + 1.0 × 2128 • Greater than the largest positive number in single-precision IEEE 754 standard. • Interpreted as + ∞ • If true exponent > 127, then the number is greater than ∞. It is called “not a number” or NaN and may be interpreted as ∞. 0 11111111 00000000000000000000000 Biased exponent Fractio n
  • 88.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 88 Negative Infinity in IEEE 754 • –1.0 × 2128 • Smaller than the smallest negative number in single-precision IEEE 754 standard. • Interpreted as - ∞ • If true exponent > 127, then the number is less than - ∞. It is called “not a number” or NaN and may be interpreted as - ∞. 1 11111111 00000000000000000000000 Biased exponent Fractio n
  • 89.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 89 Addition and Subtraction 0. Zero check - Change the sign of subtrahend, i.e., convert to summation - If either operand is 0, the other is the result 1. Significand alignment: right shift significand of smaller exponent until two exponents match. 2. Addition: add significands and report error if overflow occurs. If significand = 0, return result as 0. 3. Normalization - Shift significand bits to normalize. - report overflow or underflow if exponent goes out of range. 4. Rounding
  • 90.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 90 Example (4 Significant Fraction Bits) • Subtraction: 0.5ten – 0.4375ten • Step 0: Floating point numbers to be added 1.000two× 2 –1 and –1.110two× 2 –2 • Step 1: Significand of lesser exponent is shifted right until exponents match –1.110two× 2 –2 → – 0.111two× 2 –1 • Step 2: Add significands, 1.000two + ( – 0.111two) Result is 0.001two × 2 –1 01000 +1100 1 00001 2’s complement addition, one bit added for sign
  • 91.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 91 Example (Continued) • Step 3: Normalize, 1.000two× 2 – 4 No overflow/underflow since 127 ≥ exponent ≥ –126 • Step 4: Rounding, no change since the sum fits in 4 bits. 1.000two × 2 – 4 = (1+0)/16 = 0.0625ten
  • 92.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 92 FP Multiplication: Basic Idea 1. Separate sign 2. Add exponents (integer addition) 3. Multiply significands (integer multiplication) 4. Normalize, round, check overflow/underflow 5. Replace sign
  • 93.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 93 FP Multiplication: Step 0 Multiply, X × Y = Z X = 0? Y = 0? Z = 0 Return Steps 1 - 5 yes no yes no
  • 94.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 94 FP Multiplication Illustration • Multiply 0.5ten and – 0.4375ten (answer = – 0.21875ten) or • Multiply 1.000two×2 –1 and –1.110two×2 –2 • Step 1: Add exponents –1 + (–2) = – 3 • Step 2: Multiply significands 1.000 ×1.110 0000 1000 1000 1000 1110000 Product is 1.110000
  • 95.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 95 FP Mult. Illustration (Cont.) • Step 3: • Normalization: If necessary, shift significand right and increment exponent. Normalized product is 1.110000 × 2 –3 • Check overflow/underflow: 127 ≥ exponent ≥ –126 • Step 4: Rounding: 1.110 × 2 –3 • Step 5: Sign: Operands have opposite signs, Product is –1.110 × 2 –3 (Decimal value = – (1+0.5+0.25)/8 = – 0.21875ten)
  • 96.
    Fall 2015, Aug19 . . . ELEC2200-002 Lecture 2 96 FP Division: Basic Idea • Separate sign. • Check for zeros and infinity. • Subtract exponents. • Divide significands. • Normalize and detect overflow/underflow. • Perform rounding. • Replace sign.

Editor's Notes

  • #2 This slide provides an overview of Digital Systems by showing how various fields contribute to the design and functioning of Digital Circuits at the center. Here is a breakdown of the key components: Binary Arithmetic (Green): Focuses on calculations performed using binary numbers (0s and 1s). Essential for arithmetic operations in digital computers, such as addition, subtraction, multiplication, and division. Boolean Algebra (Blue): A mathematical framework that deals with logical operations and binary variables (true/false or 1/0). It is the foundation for designing logic gates and circuits used in digital electronics. Switching Theory (Red): Involves the analysis and design of circuits that switch between different states (ON/OFF). Crucial for building logic gates, multiplexers, and flip-flops in digital circuits. Semiconductor Technology (Cyan): Refers to the use of semiconductors (like silicon) to build transistors, which are the building blocks of digital circuits. This technology enables the fabrication of integrated circuits used in processors, memory, and digital systems. Digital Circuits at the Core: The intersection of these fields results in digital circuits, which are the building blocks for computers, microcontrollers, and many other electronic devices. Digital circuits utilize concepts from all these areas to function efficiently, performing operations like arithmetic calculations, data storage, and logical decision-making. There is emphasis that Digital Systems integrate multiple domains to produce functioning digital hardware and software. It highlights how both theoretical concepts (like Boolean Algebra) and practical technology (like semiconductors) come together to create the digital devices we use.
  • #3 In Computer Architecture, number systems are essential because all digital systems represent data and perform operations using numerical values in binary and other number systems. This topic lays the foundation for understanding how computers encode data, perform arithmetic operations, and store information. Importance in Computer Architecture: Understanding Hardware Operations: All computer operations are based on binary data, making number systems fundamental for understanding processor functionality. Debugging and Memory Management: Hexadecimal representations are common when working with machine code, memory dumps, and low-level programming. Instruction Set Architecture (ISA): Instruction encoding and decoding rely on binary operations and number systems. This topic serves as a critical building block for in helping you comprehend how computers process and store data. With these foundational concepts, students can progress to more advanced topics like ALU design, cache memory, and CPU instruction sets.
  • #4 Wat is the importance of binary arithmetic in computing: Binary Digits (0 and 1): Computer hardware is designed to work with binary values, meaning it can only process data represented in 0s and 1s. This is because hardware, such as transistors in circuits, operates in two states (on/off), which corresponds naturally to binary. Representation of Numbers: Since hardware only deals with binary, all types of numbers—integers, floating-point (decimals), positive or negative—must be represented in binary form. These binary representations are called bits (binary digits). Electronic Circuits for Arithmetic: By representing numbers in binary, electronic circuits can be designed to perform standard arithmetic operations, such as addition, subtraction, multiplication, and division. These operations are fundamental to the functioning of computers, enabling them to solve mathematical problems and perform computations efficiently. Binary arithmetic is crucial because it allows computers to represent data in a format compatible with their electronic circuits, enabling them to carry out various calculations.
  • #5 ^This slide explains the representation of positive integers in both the decimal and binary systems: Decimal System The decimal system is the base-10 system, which is made up of 10 digits: {0, 1, 2, ..., 9}. Each digit in a decimal number is associated with a power of 10, depending on its position. Examples: 41 is represented as:41=4×101+1×10041=4×101+1×100 255 is represented as:255=2×102+5×101+5×100255=2×102+5×101+5×100 Binary System The binary system is the base-2 system, which uses only two digits: {0, 1}. Each digit in a binary number is associated with a power of 2, depending on its position. Examples: The binary number 00101001 can be represented as:0×2^7+0×2^6+1×2^5+0×2^4+1×2^3+0×2^2+0×2^1+1×2^0 Simplifying this gives:=32+8+1=41=32+8+1=41 The binary number 11111111 represents:255. This is the largest value that can be represented with 8 binary digits (bits), and is equivalent to: 2^8−1=255 Key Concepts: In binary representation, each bit is either 0 or 1. The largest number that can be represented with n bits in binary is given by the formula 2^n−1. Binary is crucial for computing because all operations in computer systems are performed using binary logic.
  • #6 This slide explains the concept of base or radix in number systems. Key Concepts: Base (Radix): The base or radix of a number system is the number of unique digits used to represent numbers in that system. For the decimal system, the base is 10, which means it uses 10 digits: {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}. For the binary system, the base is 2, which means it uses 2 digits: {0, 1}. Representation Notation: The base of a number is usually indicated as a subscript. For example, 41 in decimal is written as 41_{10}, indicating it is in base 10. Similarly, the binary representation is indicated as 1010012101001_21010012​, indicating it is in base 2. Examples: 411041_{10}4110​ (decimal) is equivalent to 101001 in binary (1010012101001_21010012​). 11110111_{10}11110​ (decimal) is equivalent to 1101111 in binary (110111121101111_211011112​). Conversely, the binary number 111 (1112111_21112​) is equivalent to 7 in decimal (7107_{10}710​). What about negative numbers?: The slide ends with a question about negative numbers, implying that there is a way to represent negative values in binary, which is commonly done using methods like two's complement representation. Summary: The base or radix is fundamental to understanding different number systems. Decimal uses base 10 and binary uses base 2. The notation with a subscript helps specify which base the number is in. Conversion between bases helps represent numbers differently, which is crucial in computing, as computers operate in binary while humans often use decimal.
  • #7 This slide explains the concept of signed magnitude representation for binary numbers and why it might not be the best method for representing signed values. Key Concepts: Fixed Length Binary Representation: A fixed-length binary representation is used for binary numbers, meaning the number of bits remains constant, such as 8 bits (1 byte) shown here. Most Significant Bit (MSB) as the Sign Bit: In signed magnitude representation, the left-most bit (also known as the most significant bit, or MSB) is used to represent the sign of the number. 0 in the MSB indicates a positive value. 1 in the MSB indicates a negative value. Example: For +18 in decimal (18_{10}​): Its binary representation is 00010010. The MSB is 0, indicating the number is positive. For -18 in decimal (−18_{10}: The binary representation is 10010010. The MSB is 1, indicating the number is negative. The rest of the bits represent the magnitude of the number, which is the same whether it is positive or negative. Challenges with Signed Magnitude Representation: Complexity in Arithmetic Operations: This method of representing signed values complicates arithmetic operations. For example, addition or subtraction of numbers requires special handling due to the sign bit. There can also be the issue of having two representations of zero: +0 (00000000) and -0 (10000000), which adds unnecessary complexity. Summary: Signed magnitude is one way to represent negative numbers in binary using the MSB as the sign bit. It is not ideal for most computations as it introduces complexities, especially in performing arithmetic operations.
  • #8 This slide discusses the difficulties with the signed magnitude representation for representing integers in binary. Key Difficulties: Complex Handling of Sign and Magnitude: In signed magnitude representation, the most significant bit (MSB) represents the sign (0 for positive, 1 for negative), and the remaining bits represent the magnitude of the number. This means that the sign and magnitude bits must be handled differently in arithmetic operations, which complicates the logic. Arithmetic Operations Require Different Logic: Addition and subtraction with signed magnitude representation are complicated because each operation requires special logic circuits to handle both the sign and magnitude correctly. Handling the sign separately from the magnitude adds complexity, which requires different hardware logic circuits. Overflow Detection: Overflow occurs when the result of an arithmetic operation exceeds the range that can be represented with the available bits. With signed magnitude representation, detecting overflow is more challenging compared to other binary representations like two's complement because of the separate sign bit. Two Representations for Zero: Zero can be represented in two ways: +0: 00000000_2 -0: 110000000_2​ This redundancy leads to inefficiencies and adds further complexity in arithmetic operations and comparisons. Modern Usage: Due to these difficulties, signed magnitude representation is not used in modern computers for representing signed integers. Instead, more efficient and simpler representations like two's complement are used, which make arithmetic operations more straightforward and efficient. Summary: The signed magnitude representation of numbers complicates arithmetic operations, requires different handling of sign and magnitude bits, is prone to overflow issues, and has two redundant representations of zero. Because of these limitations, it is not used in modern computing systems, which prefer more robust representations like two's complement.
  • #9 This slide covers the problems associated with finite math in digital systems, particularly focusing on issues related to number representation and limitations of digital circuits. Key Concepts: Finite Size of Representation: Digital circuits use a fixed number of bits to represent values. This implies that numbers can only be represented within a limited range due to the finite size of available bits. For example, with 4-bit numbers, the values range from 0000 (0) to 1111 (15). When values exceed this range, overflow occurs. Overflow detection becomes important as digital systems need to handle scenarios where the computed value exceeds the representable range. Overflow: Since digital circuits cannot be arbitrarily large, numbers can become too large to be represented within the fixed bit size. This condition is called overflow. Overflow is easy to detect because the value exceeds the available bit limit, causing incorrect results or wrap-around effects. Representing Negative Numbers: In finite systems, we also need to represent negative numbers along with positive values. This requires a suitable representation that can accommodate both positive and negative values while maintaining unique representation of zero. Many systems use methods like two's complement to represent negative numbers efficiently, avoiding issues like two different representations for zero. Limited Universe of Integers: Unlike real-world mathematics, digital circuits work within a limited universe of integers, due to the constraints of bit size. As shown on the slide, numbers wrap around once they reach their maximum value. For instance, in 4-bit representation, if we add to the maximum number (15), it "wraps around" to 0, leading to overflow. Summary: Digital systems have a finite number of bits to represent numbers, leading to issues like overflow and limited range. Negative number representation is another challenge, which requires careful handling to ensure efficient calculations and avoid redundant representations like having two zeros. These challenges highlight the limitations of digital hardware when it comes to representing the infinite range of real-world integers.
  • #10 This slide explains the concept of a 4-bit universe, which is a representation of the range of values that can be encoded using a 4-bit binary number system. Key Points: 4-bit Representation: In a 4-bit binary system, there are 16 possible combinations of bits, ranging from 0000 to 1111. Each combination corresponds to an integer value, meaning we can represent 16 different integers using 4 bits. Unsigned Representation (0 to 15): In the left circle, each binary value is mapped to an integer in the range 0 to 15. This is called an unsigned representation because all values are non-negative. The numbers start from 0000 (which represents 0) up to 1111 (which represents 15). This range is often called a modulo-16 universe, since it is cyclic and wraps around when exceeding the range. Signed Representation (-7 to 7): The right circle shows the signed representation of values using a 4-bit system. In signed representation, one bit is typically used to indicate the sign (positive or negative). The range of representable values is from -7 to 7. For example: 0000 represents 0. Positive values like 0001 to 0111 represent 1 to 7. Negative values like 1000 to 1111 represent -8 to -1. Wrap-Around (Modulo Arithmetic): Due to the limited number of bits, values in a 4-bit universe wrap around. This is called modulo arithmetic. If you add 1 to 1111 (15 in unsigned), it wraps around to 0000 (0). Similarly, adding to the maximum positive value or subtracting from the minimum negative value will cause a wrap-around, which can lead to overflow or underflow in digital systems. Summary: A 4-bit binary system can represent 16 values, either as 0 to 15 (unsigned) or -7 to 7 (signed). Modulo arithmetic means values wrap around when they exceed the bit-limit, which has implications for how arithmetic operations are performed in digital systems. Understanding the range and limitations of bit representation is crucial when working with computer hardware, as it affects how data is stored and processed.
  • #11 This slide explains the concept of 1's Complement Numbers, which is a method for representing signed binary numbers. Let's break down the key points: Key Concepts: 1's Complement Representation: 1's complement is a method to represent negative numbers in binary. To find the 1's complement of a binary number, invert all the bits (change 0 to 1 and 1 to 0). This method allows both positive and negative numbers to be represented in the binary system. Positive and Negative Representation: The left circle on the slide shows a visual representation of numbers from -7 to 7 using 1's complement. The table on the right lists the decimal magnitudes from 0 to 7, and shows their corresponding positive and negative binary representations in 4 bits. For instance: Decimal 0 is represented as 0000 (positive) and 1111 (negative). Decimal 1 is 0001 for positive and 1110 for negative. Negative values are calculated by inverting all the bits of the positive value. Negation Rule: The negation rule in 1's complement simply involves inverting all the bits. For example, to find -3 from 3, you invert the bits of 0011 to get 1100. Problem with Zero: In 1's complement representation, there is a problem with representing zero: there are two different representations of zero (0000 for positive zero and 1111 for negative zero). This leads to ambiguity and can make arithmetic operations involving zero more complex. Challenges of 1's Complement: The presence of two representations of zero (+0 and -0) can complicate computations. Because of this redundancy, 1's complement is not commonly used in modern computing systems. Summary: 1's complement is a way to represent negative numbers in binary by inverting bits. Each positive number has a corresponding negative representation, found by inverting all its bits. The ambiguity of zero (having both +0 and -0) makes this system less efficient, which is why modern computers do not use it.
  • #12 Let us look at  2's complement representation, which is the most common way to represent negative binary numbers in modern computers. Let's break down the key concepts: Key Concepts: 2's Complement Representation: 2's complement is a method used to represent negative numbers in binary form. It eliminates the problem seen in 1's complement where zero has two representations. In 2's complement, negative numbers are obtained by inverting all bits (changing 0 to 1 and 1 to 0) of the positive number and then adding 1 to the result. Negation Rule: To obtain the 2's complement of a binary number, you: Invert all bits (turn all 0s to 1s and vice versa). Add 1 to the resulting binary number. For example: To find -3 from 3 in 4-bit binary: Start with 0011 (which is 3). Invert all bits: 1100. Add 1: 1100 + 1 = 1101. Visual Representation: The left diagram represents numbers in a circle with positive numbers on the right side and negative numbers on the left. The negative numbers are obtained by using the 2's complement of their corresponding positive numbers. Binary Representation in the Table: The table on the right shows positive and negative values for decimal magnitudes ranging from 0 to 8. Positive values are represented normally in binary (e.g., 4 is 0100). Negative values are represented using 2's complement (e.g., -4 is 1100). The negative value is computed by taking the 2's complement of the positive value. Benefits of 2's Complement: There is only one representation for zero (0000), which eliminates the ambiguity of having +0 and -0. Arithmetic operations (addition and subtraction) are simpler because negative numbers can be directly added to positive numbers without special handling of the sign bit. Summary: 2's complement is a widely-used method for representing signed binary numbers. It solves the issues found in 1's complement representation, such as the existence of two zeroes and complexity in arithmetic. To obtain a negative number in 2's complement, you invert all the bits of the positive number and add 1. This system makes arithmetic operations simpler and is more efficient for use in digital computers.
  • #13 This slide explains two methods of representing signed integers using binary representation: 1's complement and 2's complement. Both of these methods do not use a separate sign bit; instead, they encode the sign as part of the binary value itself. Key Concepts: Fixed-Length Representation: Both 1's complement and 2's complement use fixed-length binary representations to store both positive and negative values. There is no separate or explicit sign bit in these methods; instead, the way the bits are arranged represents the sign and magnitude. 1's Complement: To represent a negative number in 1's complement, each bit of the given positive number is inverted (i.e., 0 becomes 1, and 1 becomes 0). For example, to represent -5, start with 5 in binary (0101), and invert all bits: 1010. One limitation of 1's complement is that it results in two representations for zero: 0000 for +0 and 1111 for -0. 2's Complement: In 2's complement, a negative number is formed by taking the 1's complement of the number and then adding 1 to it. Alternatively, you can think of it as subtracting 1 from the given number and then complementing each bit. For example, to represent -5: Start with 5 in binary (0101). Invert each bit: 1010 (1's complement). Add 1: 1010 + 1 = 1011. 2's complement fixes the two representations of zero issue by providing a unique representation for 0 (0000). Preferred Representation: 2's complement is the preferred method for representing signed integers in modern computing because: It provides a single representation for zero. It simplifies arithmetic operations since positive and negative numbers can be added directly without special logic for handling signs. It resolves problems that arise with carry-over and overflow during calculations. Summary: 1's complement: Invert all bits to represent a negative number. 2's complement: Invert all bits and add 1 to represent a negative number. 2's complement is preferred because it simplifies arithmetic and has a single representation for 0.
  • #14 This slide explains why 2's complement is preferred over 1's complement for representing signed integers, with some details about its properties. Key Points: Why Not 1's Complement?: It has two representations for zero (+0 and -0), which makes arithmetic operations more complex. Negation Rule for 2's Complement: To form a negative number, you can subtract 1 from the positive value and then invert all bits, or alternatively, invert the bits first and add 1. Properties of 2's Complement: One representation for zero. Balanced positive and negative numbers: There are an equal number of positive and negative numbers in the system. Slight asymmetry: There is one more negative number than positive because the most negative value does not have a positive counterpart. Summary: 2's complement is chosen over 1's complement because it has a single representation for zero and simplifies arithmetic operations. It ensures balanced positive and negative values, though with slight asymmetry. This explanation repeats the key advantages of 2's complement, which have already been discussed in the previous slides about signed integer representation and why 2's complement is the preferred method.
  • #15 This slide provides an overview of the general method for representing signed integers in binary, including how to partition the range and apply negation. Key Points: Number of Bits: Select the number n of bits to represent integers. The representation range depends on the number of bits. Partitioning Integers: The total number of integers that can be represented with n bits is 2n. These integers are divided into two sets: Positive Integers: Represented by 00...0 through 01...1. There are 2^n/2^n-1  positive integers. Negative Integers: Represented by 10...0 through 11...1. There are also 2^n/2^n−1 negative integers. Negation Rules: Signed Magnitude: The most significant bit (MSB) is used for the sign. To negate, invert the MSB. 1's Complement: Negate by inverting all bits, which is equivalent to subtracting from 2n−1 or flipping all the bits. 2's Complement: To negate, subtract from 2^n or invert all bits and add 1. This is the same as taking the 1's complement and adding 1. Summary: This slide presents the approach for representing signed integers using different methods—signed magnitude, 1's complement, and 2's complement—and how each method deals with the partitioning and negation of positive and negative numbers in binary form.
  • #16 This slide illustrates the representation of signed integers in three different systems—Signed Magnitude, 1's Complement, and 2's Complement—using 4 bits (n = 4). Each system represents a unique way of encoding positive and negative numbers in binary. Key Points: Signed Magnitude (left circle): Uses the most significant bit (MSB) to indicate the sign (0 for positive, 1 for negative). Numbers range from -7 to 7. Example: 1010 represents -2 in signed magnitude. 1's Complement (middle circle): Represented by flipping all bits to get the negative of a number. Numbers range from -7 to 7, but zero has two representations (0000 for +0 and 1111 for -0). Example: 1010 represents -5 in 1's complement. 2's Complement (right circle): Obtains the negative by flipping all bits and adding 1 to the least significant bit. Numbers range from -8 to 7 with only one representation for zero. Example: 1010 represents -6 in 2's complement. Summary: The slide shows the three methods to represent signed integers in binary and how the values are distributed in each case, demonstrating the different ways the negative and positive ranges are encoded. The key differences lie in the representation of negative values and how zero is treated. The 2's complement is preferred because it has a single representation for zero and simpler arithmetic operations.
  • #17 This slide illustrates how signed integers are represented using three different methods: Sign-magnitude, 1's complement, and 2's complement, each with 3-bit binary values. Key Concepts: Sign-magnitude Representation: The leftmost bit is used for the sign (0 for positive, 1 for negative). The remaining bits represent the magnitude. 100 represents -0 and 111 represents -3. Range: -3 to +3. 1's Complement Representation: Negative values are represented by inverting all bits of their positive counterparts. Zero has two representations: 000 for +0 and 111 for -0. 100 represents -3 and 111 represents -0. Range: -3 to +3. 2's Complement Representation (Preferred): To get the negative of a number, invert all bits and add 1 to the least significant bit (LSB). There is only one representation for zero (000). 100 represents -4 and 111 represents -1. Range: -4 to +3. Summary: Sign-magnitude and 1's complement have limitations, such as two representations for zero and more complex arithmetic operations. 2's complement is the preferred representation because it simplifies arithmetic and has a unique representation for zero. It also provides an easy mechanism for finding the negative of a value, making it the standard in modern computing systems.
  • #18 This slide visualizes 2's complement representation for 3-bit numbers, showing how positive and negative values are represented on a circular diagram. Key Concepts: 2's Complement Representation: This method is used to represent both positive and negative integers using binary numbers. The range for a 3-bit 2's complement representation is from -4 to +3. Positive and Negative Numbers: The positive numbers (000 to 011) are represented in the upper half of the circle. The negative numbers (100 to 111) are represented in the lower half. 000 represents 0, and 100 represents -4. Negation: Negation is performed by inverting all bits and adding 1. This process allows easy transformation between positive and negative values. The arrows at the bottom indicate how the negation works for each number. Addition and Subtraction: The diagram shows how moving clockwise results in addition, while moving counterclockwise indicates subtraction. This is why the numbers wrap around the circle, simulating overflow when reaching beyond the maximum range. Overflow: When trying to go beyond +3, overflow occurs, and the representation wraps to -4. This overflow behavior is typical in digital systems when the number exceeds the bit range. Summary: This representation helps visualize how 2's complement allows seamless arithmetic for both positive and negative numbers. Overflow occurs naturally when the range limit is exceeded, and the concept of negation is simplified, making it suitable for hardware-level arithmetic operations.
  • #19 This slide discusses 2's complement representation for n-bit numbers, which is a method used to represent both positive and negative numbers in binary form. Key Concepts: Range: The range for an n-bit number in 2's complement is from -2^(n-1) to 2^(n-1) - 1. For example, in an 8-bit representation, the range is from -128 to 127. Unique Zero: 2's complement has only one representation for zero (00000000), which avoids the issue seen in 1's complement where there are two representations for zero (+0 and -0). Negation Rule: To negate a number in 2's complement, you can invert all bits and add 1, or subtract 1 and then invert all bits. Bit Length Expansion: When expanding the bit length of a number, the leftmost bit (called the sign bit) is extended. For example, 11111101 still represents -3, and 00000011 is equivalent to 011, representing 3. Most Significant Bit (MSB): The MSB is the leftmost bit in the binary representation, and it indicates the sign: 0 for positive numbers 1 for negative numbers Overflow Rule: Overflow occurs when the result of adding two numbers with the same sign bit (both positive or both negative) exceeds the representable range. For example, adding two positive numbers that result in a negative value due to overflow. Subtraction Rule: To subtract A - B, compute A + (-B), which means you take the 2's complement of B and add it to A. Summary: 2's complement is a widely used binary representation system for signed integers due to its efficiency in representing negative numbers, unique zero representation, and simplicity for arithmetic operations such as addition, subtraction, and negation.
  • #20 This slide provides a summary of the key concepts related to number representation in both decimal and binary systems. Key Concepts: Finite Set of Integers: For a given number (n) of digits, we can represent a finite set of integers. Example: With 3 decimal digits, there are 10^3 = 1,000 integers in the decimal system, while with 3 binary digits, there are 2^3 = 8 integers in the binary system. Dividing the Integer Set: The integer set [0, r^n - 1] is divided into equal parts for positive and negative numbers. The radix (r) can be 10 for decimal or 2 for binary. This means half of the available values are used to represent positive numbers and the other half to represent negative numbers. Complement Relationship: Positive and negative numbers of equal magnitudes are complements of each other, which means that the sum of a number and its complement equals zero. Mathematically, this is represented as x + complement(x) = 0. This concept is key to how negative numbers are represented in binary systems (e.g., using 1's or 2's complement). Overall, this slide provides a recap of how numbers are represented in different systems, the concept of finite representation, and how complements work for positive and negative numbers in binary systems.
  • #21 This slide summarizes how complements are defined for both decimal and binary integer representations. Decimal Integers: 10's Complement: Formula: -x = Complement(x) = 10^n - x To calculate the 10's complement, first find the 9's complement of the number and then add 1 to it. 9's Complement: Formula: -x = Complement(x) = 10^n - 1 - x To find the 9's complement, subtract each digit of the number from 9. Steps: For 9's complement: Subtract each digit from 9. For 10's complement: Add 1 to the 9's complement. Binary Integers: 2's Complement: Formula: -x = Complement(x) = 2^n - x 2's complement is found by taking the 1's complement and adding 1. 1's Complement: Formula: -x = Complement(x) = 2^n - 1 - x To find the 1's complement, invert all the bits (i.e., change 0 to 1 and 1 to 0). Steps: For 1's complement: Subtract each bit from 1 (essentially flipping each bit). For 2's complement: Add 1 to the 1's complement. These complement methods are used to represent negative numbers and perform subtraction operations in binary systems. For binary, 2's complement is generally preferred due to the simplicity it provides in arithmetic operations (especially avoiding dual zero representation).
  • #22 This slide explains the concept of "complement." Mathematical Complement: The term "complement" refers to something that completes or makes a whole. For example, in mathematics, a number XX plus its complement XX equals a complete set or "whole." This concept is often used in binary arithmetic, where two numbers combine to give a sum of all 1s. Opposites in Other Contexts: "Complement" can also mean "opposite." For instance, in color theory, complementary colors are placed directly opposite each other on the color wheel. These colors balance each other visually. Complementary Numbers: In mathematics, complementary numbers function similarly to electric charges. Positive and negative numbers of equal magnitude are complementary, meaning they cancel each other out, resulting in zero. The idea of complement is used in computing to represent negative numbers using positive equivalents, such as one's complement or two's complement representation in binary systems.
  • #23 This slide explains the concept of two's complement representation and the differences between finite and infinite numeric ranges: Two's Complement Representation: The top section of the slide illustrates how numbers are represented in two's complement form in binary using 3 bits. In a 3-bit binary system, the range of numbers goes from -4 to +3. Positive numbers are represented straightforwardly in binary, whereas negative numbers use two's complement. For example, 100 represents -4. Finite Universe of Decimal and Binary Numbers: The two circles represent the idea of a finite universe in both decimal and binary systems. On the left, the circle illustrates a "finite universe" for 3-digit decimal numbers, which ranges from 000 to 999. On the right, the circle represents the finite universe of 3-bit binary numbers, ranging from 000 to 111. Each of these circles illustrates how, in two's complement, the values wrap around: after the maximum value (e.g., 999 or 111), it returns back to 000. Concept of Wrap-Around: Two's complement makes use of the wrap-around concept, where after reaching the maximum positive number, adding one will bring the number to the minimum negative value. This is why the two circles are shown with arrows, indicating the wrap-around behavior that is a key characteristic of fixed-size binary representations. This slide aims to show how binary numbers have a limited range due to their bit length, and it uses a visual analogy with a decimal number representation to illustrate the finite nature of the number system.
  • #24 This slide explains examples of complements for both decimal integers and binary integers using different complement systems: Decimal Integers (Base 10, n = 3) The radix (r) is 10, and the number of digits (n) is 3. 10's Complement: To find the complement of -50: Complement(50) = 10³ - 50 = 950. To verify: 50 + 950 = 1000, which is 0 in a 3-digit representation (i.e., it wraps around and results in zero). 9's Complement: To find the 9's complement of -50: Complement(50) = 10ⁿ - 1 - 50 = 949. To verify: 50 + 949 = 999, which is considered -0 in 9's complement representation. Binary Integers (Base 2, n = 4) The radix (r) is 2, and the number of bits (n) is 4. 2's Complement: To find the complement of -5: Complement(5) = 2⁴ - 5 = 11₁₀ or 1011₂. To verify: 5 + 11 = 16, which is 0 in 4-bit representation due to overflow (wrap-around to zero). 1's Complement: To find the 1's complement of -5: Complement(5) = 2⁴ - 1 - 5 = 10₁₀ or 1010₂. To verify: 5 + 10 = 15, which is -0 in 1's complement representation. Key Points 10's complement and 9's complement are used for decimal numbers. 2's complement and 1's complement are used for binary numbers. In each system, adding a number and its complement results in a value that wraps to 0, demonstrating how complement representation works for arithmetic
  • #25 This slide explains how to convert a 2's complement binary number to its decimal representation. Key Concepts: 2's complement is used to represent both positive and negative numbers in binary form. The general formula for 2's complement conversion is: bn−1bn−2⋯b1b0=−2n−1bn−1+∑i=0n−22ibibn−1​bn−2​⋯b1​b0​=−2n−1bn−1​+i=0∑n−2​2ibi​This means the most significant bit (MSB) is treated as a negative weight, and the rest are summed as positive weights. Example with an 8-bit Number: The 8-bit conversion box shows the weights assigned to each bit from left to right: Weights: −128,64,32,16,8,4,2,1−128,64,32,16,8,4,2,1 The binary representation given is: 11111101 To convert this to decimal: Break down each bit and its corresponding weight: −128−128 for the MSB (since it is 1) 64,32,16,8,4,64,32,16,8,4, and 11 (all are set to 1, which means they are added) 0 is for the 22 bit, so it is not included. Summation: −128+64+32+16+8+4+1=−128+125=−3−128+64+32+16+8+4+1=−128+125=−3 Thus, the 2's complement binary number 11111101 converts to -3 in decimal. This method allows for efficient representation and calculation of both positive and negative values in binary systems.