Basic Computer Organisation And Design

Basic Computer Organisation And Design

• 1.
  BASIC COMPUTER ORGANISATIONAND DESIGN Presented by, R.RAMADEVI, I-M.SC(CS&IT) Nadar Saraswathi College Of Arts And Science, Theni.
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  BASIC COMPUTER ORGANIZATIONAND DESIGN  MEMORY REFERENCEIN INSTRUCTION  INPUT OUTPUT AND INTERRUPT COMPLETE COMPUTER DESCRIPTION  DESIGN OF A BASIC COMPUTER  DESIGN OF ACCUMULATOR LOGIC
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  MEMORY REFERENCE INSTRUCTIONS D7:Register or I/O=1  D6-D0=7  Instruction:  AND TO AC  ADD TO AC  LDA : Memory read STU : Memory write BUN : branch unconditionally BSA : branch and save return address Return address : save return address(13521)
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  SUBROUTINE CALL 0 BSAL35 PC=20 PC=21 NEXT INSTRUCTION 135 21 (return address) pc=136 subroutine 1 Bun 135
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   ISZ :increment and skip if zero control flow chart  flow chart for the 7mmemory reference instruction  the longest instruction : ISZ(76)  3 bit sequence counter INPUT-OUTPUT ANT INTERRUPT Input-output configuration: Input register (INPR) output register(OUTR)  There two register communicate with a communication interface serially and with the AC in parallel  Each quantity of information has eight bits of an alphanumeric code  Input flag(FGI),output flag(FGO)  FGI : set when INPR is ready clear when INPR is empty  FGO: set when operation is completed clear when output device is in the process of printing INPUT-OUTPUT INSTRUCTION P=D7IT3,IR(I)=Bi IR(6-11),B6-B11=6 I/O Instruction
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  PROGRAM INTERRUPT  INPUT-OUTPUTTRANSFER MODE  Programmed I/O  Interrupt-initiated I/O  DMA  IOP INTERRUPT CYCLE: During the executed phare , IEN is checked by the control IEN=0 the programmer does not want to use the interrupt so control continues with the next instruction cycle IEN=1 the control circuit checks the flags bit if (FGI/FGO) FLAG SET TO I,R F/F Set to 1
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   At theend of the executed phare control check the value of r  R=0 instruction cycle *R=1 instruction interrupt cycle  Demonstration of the interrupt cycle  The memory location at address 0 as the place for storing the return address  Interrupt branch to memory location  Interrupt cycle Complete computer description: The final flow chat of the instruction cycle The control function and microperation DESIGN OF BASIC COMPUTER The basic computer consists of the following hardware components 1.A memory unit with 40% word of 16bits 2.Nine register : AR,PC,DR,AC,IR,TR,OUTR,INTR,SC 3. sever F/FS:I,S,E,R,IEN,FGL AND FGO
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  4.Two decoder incontrol unit : 3*8 operation decode 4*16 timing decode 5.A 16 bit common bus 6.Control logic gates 7.Address and logic circuit connected to the AC input control logic gates  Signal to control the I/O of the nine register  Signal to control the create write I/O of memory  Signal to set ,clear or complement the FIFS  Signal for s2 s1 s0 to select a register for the bus  Signal to control the AC adder and logic circuit  Register control :AR
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   Control Inputof AR :LD,INR,CLK  Control FUNCTION MEMORY CONTROL :READ  Control input of memory : READ,WRITE  Find all the statement that specify a read operation  control function F/F CONTROL: IEN  CONTROL FUNCTION BUS CONTROL  Encode for bus selection s0=x1+x3+x5+x7 s1=x2+x3+x6+x7 s2=x4+x5+x6+x7
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   control function same as memory read  control function  memory write
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  ADDER AND LOGICCIRCUIT
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  THANKYOU!!!