Abstract
This paper discusses a 4th generation graphics computing and display system. It defines the following as components of 4th generation graphics architecture: a combination of pipelined parallel coprocessors, custom VLSIs for vector drawing, bit slice and mathematics chips for geometry processing, a 32-bit VMEbus structure, and a new display list data structure. The paper shows how these components and modular architecture add high performance-to-cost effectiveness of raster-scan graphics display systems.
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References
Tsuneo Ikedo, “High-Speed Techniques for the 3-D Color Graphic Terminal,” to appear in IEEE Computer Graphics and Applications, 1984.
Akira Fujimoto, C.G. Perrott, and Kansei Iwata, “3-D Color-Shaded Graphics Display with Depth Buffer and Pipeline Processor,” to appear in IEEE Computer Graphics and Applications, 1984.
Mary C. Whitton, “Memory Design for Raster Graphic Displays,” IEEE Computer Graphics and Applications, pp. 48 to 65, Vol. 4, No. 3, 1984.
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© 1985 Springer-Verlag Tokyo
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Kaya, E.M. (1985). New Trends in Graphic Display System Architecture. In: Kunii, T.L. (eds) Frontiers in Computer Graphics. Springer, Tokyo. https://doi.org/10.1007/978-4-431-68025-3_23
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DOI: https://doi.org/10.1007/978-4-431-68025-3_23
Publisher Name: Springer, Tokyo
Print ISBN: 978-4-431-68027-7
Online ISBN: 978-4-431-68025-3
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