MAXQ introduction
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MAXQ family is a new 16-bit RISC microcontroller from Maxim Integrated Products & Dallas Semiconductor, which are targeted toward low-cost,low-power,embedded-application designs.
MAXQ is register-based transport triggered architecture on which all instructions reduce to either writing an immediate value to a destination register or memory location or moving data between registers and/or memory locations. So any new functionality can be added by simply adding new register modules.
MAXQ supports 16 register modules out of which 10 register modules are reserved for general purpose registers and instructions, which are known as system register modules. The remaining six register modules are known as peripheral register modules.
The variants of MAXQ may have different kinds of peripheral register modules but share the common instruction set, which are provided by system register modules. The peripheral register modules provide the I/O functions.
On MAXQ program memory and data memory are separate from one another, which is known as Harvard memory architecture.
System register module is an accumulator based architecture on which the accumulator register will be the implicit destination operand for all ALU operations.
Initially the MAXQ architecture has two slightly different versions named MAXQ10 and MAXQ20. The primary difference between the MAXQ10 and MAXQ20 options is the standard width of the working accumulators and supporting arithmetic logic unit (ALU). The MAXQ10 supports 8-bit (byte-wide) accumulators and ALU operations, while the MAXQ20 supports 16-bit (word-wide) accumulators and ALU operations.
More Information about MAXQ
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http://www.maxim-ic.com
http://www.maxim-ic.com.cn/appnotes.cfm/appnote_number/3222
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/4466
About MAXQ GCC port
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This port supports the following features
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MAXQ10 and MAXQ20 versions of MAXQ.
Integer/ Long integer/ Floating-point arithmetic
newlib functions, which don’t have any I/O operations
Harvard memory architecture
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Since data and code memory are separate form one another, we need to explicitly copy the static data to the data memory. The memory startup routine does this job. More details are there in the file crt1.s in the maxq port directory.
Unsupported features
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Does not support long-long data type and C99 features.
Peripheral modules
This port does not support any special peripheral module.
I/O functions
All I/O functions are based on peripheral modules so they are not supported.
Known problem
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Compiler for MAXQ10 is currently not fully stabilised and we will be posting subsequent patches for its fix.
Testing GCC for MAXQ
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We have used standard DEJAGNU testsuites for testing GCC for MAXQ.
Functional correctness has been tested with the simulator for MAXQ.
Simulator is being integrated with the GDB, which will be posted later on.
Simulator is available on request to [email protected] or [email protected]
Test Results summary
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DEJAGNU testsuites have been executed for MAXQ gcc port testing. We are not supporting 'long-long' and C99 features so those cases will fail.
Configuring and Installing
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Binutils patch for MAXQ has already been posted. Only while building gcc with binutils we need to specify the option '--enable-bfd-assembler'. For the combined build go to the sources and do:
> configure --target=maxq-coff --prefix=/prefix/path --enable-languages=c
--enable-multilib --enable-bfd-assembler
> make
> make install
While building with newlib '--with-newlib' option need to be specified.
Credits
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Konark Goel