Jianming Tong

jianming [dot] tong [at] gatech [dot] edu

Ph.D. at Georgia Tech starting from Spring 2021

Advisor: Tushar Krishna

Main Developer for CROSS, FEATHER

I'm funded by Qualcomm Innovation Fellowship and SRC Jump 2.0

Cryptography Acceleration Lead in Synergy Lab @ Gatech


Mission: Build high-performance systems that the real world actually uses.

Research Interest

I'm a Computer Architect, focusing on system for AI and Cryptography, e.g., enabling today’s AI systems to work in a privacy-preserving manner without sacrificing performance.


News

Leading Publications (* Equal Contribution)

CROSS Overview
Leveraging ASIC AI Chips for Homomorphic Encryption
High-Performance Computer Architecture (HPCA), Jan 2026.
++CROSS is Deployed in Google TPU Cloud
++CROSS won 2nd place at DAC university demo
++CROSS won the GT NEXT Award
FEATHER: A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
International Symposium on Computer Architecture (ISCA), Jun 2024.
++LayoutLoop is Integrated into NVLabs/Timeloop
SquareLoop: Explore Optimal Authentication Block Strategy for ML
Proceedings of the 14th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP), Oct 2025.
SCALE-Sim v3: A Modular Cycle-Accurate Systolic Accelerator Simulator for End-to-End System Analysis
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Sep 2025.
SmartPAF: Accurate Low-Degree Polynomial Approximation of Non-polynomial Operators for Fast Private Inference in Homomorphic Encryption
In Proc of Seventh Conference on Machine Learning and Systems, (MLSys), May 2024.
Hardware-Software co-design for real-time latency-accuracy navigation in tinyML applications
(IEEE micro), Sep 2023.
SUSHI: SUbgraph Stationary Hardware-software Inference Co-design
In Proc of Sixth Conference on Machine Learning and Systems (MLSys), Jun 2023.
++Qualcomm Innovation Fellowship
++Best Poster Award (IAP2023@MIT)
SMMR-explore: Submap-based multi-robot exploration system with multi-robot multi-target potential field exploration method
IEEE International Conference on Robotics and Automation (ICRA), 2021. Oral

Collaborative Publications (* Equal Contribution)

As Collaborator or Mentor

Exploring Constrained Dataflow Accelerator for Real-Time Multi-Task Multi-Model Machine Learning Workloads
Jamin Seo, Jianming Tong, Hyoukjun Kwon, Tushar Krishna and Saibal Mukhopadhyay.
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Sep 2025.
Real-time Digital RF Emulation – II: A Near Memory Custom Accelerator
IEEE Transactions on Radar Systems (TRadar), Sep 2024.
SNATCH: Stealing Neural Network Architecture from ML Accelerator in Intelligent Sensors
IEEE SENSORS conference(SENSORS), Aug 2023.
On Continuing DNN Accelerator Architecture Scaling Using Tightly-coupled Compute-on-Memory 3D ICs
IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Jul 2023.
FPGA-Based High-Performance Real-Time Emulation of Radar System using Direct Path Compute Model
International Microwave Symposium (IMS), Jun 2023.
A High Performance Computing Architecture for Real-Time Digital Emulation of RF Interactions
In Proc of IEEE Radar Conference, (RadarConf), May 2023.
A Configurable Architecture for Efficient Sparse FIR Computation in Real-time Radio Frequency Systems
International Microwave Symposium (IMS), 2021.
ac2SLAM: FPGA Accelerated High-Accuracy SLAM with Heapsort and Parallel Keypoint Extractor
International Conference on Field-Programmable Technology (FPT), 2021. Full Paper
PIT: Processing-In-Transmission with Fine-Grained Data Manipulation Networks
IEEE Transactions on Computers (TOC), 2021.
COCOA: Content-Oriented Configurable Architecture Based on Highly-Adaptive Data Transmission Networks
Proceedings of the 2020 on Great Lakes Symposium on VLSI (GLSVLSI), 2020.
Insight: Adding NoC between Mem-Cache-CPU for supporting Sorting, Ordering and Multicasting (SOM) could boost 25X CPU perfromance for matrix inversion.
abstract paper bibtex

Workshops

A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
Jianming Tong, Anirudh Itagi, Tushar Krishna
ReLU-FHE: Low-cost Accurate ReLU Polynoimal Approximation in Fully Homomorphic Encryption Based ML Inference
FastSwtich: Enabling Real-time DNN Switching via Weight-Sharing

Book

On-chip Network (Chinese)
Translator: Pengju Ren, Tian Xia, Jianming Tong, Pengcheng Zong, Haoran Zhao
Abstract
This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks.


Education

Georgia Institute of Technology, USA
Ph.D. in Computer Science • Jan. 2021 to Present
Advisor: Prof. Tushar Krishna
Georgia Institute of Technology, USA
MS. in Computer Science • Jan. 2021 to May 2024
Advisor: Prof. Tushar Krishna
Xi'An Jiaotong University, China
B.E. in Electrical Engineering • Sep. 2016 to Jun. 2020
Advisor: Prof. Pengju Ren


Experience

Google, USA
Student Researcher • Aug. 2024 to Apr. 2025
Host: Asra Ali Jevin Jiang
Massachusetts Institute of Technology, USA
Research Associative • Feb. 2024 to Feb. 2025
Advisor: Prof. Tushar Krishna , Host: Prof. Arvind
Rivos Inc., Mountain View CA
Ph.D. Intern in Computer Architecture • May. 2023 to Aug 2023
Pacific Northwest National Lab (PNNL), Battelle WA
Research Intern in Computer Architecture • Jun. 2022 to Aug 2022
Alibaba DAMO Academy, Beijing
Research Intern in Fully Homormophic Encryption Accelerator • Jul. 2021 to Aug. 2021
Tsinghua University, Beijing
(Visiting Student) Research Assistant in Robotics • Aug. 2020 to Jan. 2021
Advisor: Prof. Yu Wang

Honors and Awards

2nd Place in University DEMO
first demonstration of superiority of AI ASICs in HE acceleration
Jun. 2025
ML and System Rising Star
in recognition of reconfigurable AI Computing
Jul. 2024
Best Poster Award
in recognition of reconfigurable AI Computing
Sep. 2023
Winner in Qualcomm Innovation Fellowship
in recognition of runtime latency-accuracy navigation
Jul. 2023

Services

Artifact Evaluation Committee in ASPLOS'24, ISCA'24
Steering Committee in Computer Architecture Student Association (CASA)
interview Prof. Mengjia Yan
interview Prof. Todd Austin
Co-organize JOBS workshop @ MICRO'24

Life