rv32ima

RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

A minimalist RISC-V system emulator capable of running Linux kernel with efficient event-driven scheduling

可移植的 RISC-V 解释执行模拟器。模拟了常见的SoC外设，支持运行主线Linux。A portable RISC-V emulator working in instruction-interpreting way. Common SoC peripherals are emulated. Support running mainline Linux.

A port of mini-rv32ima to VScript (Squirrel 3)

Running Linux on a Pi Pico!

A Linux-supported RISC-V SoC for FPGAs, described in Verilog HDL

RISC-V emulator/simulator in Python

YetAnotherRiscVEmulator is an easily extensible RV32ima emulator capable of running linux

Minimal RISC-V core implementation (RV32IMA) for fun and learning

RISC-V emulator written in Rust. Features a TUI interface and RV32IMAC support.

A home computer built from the CPU up: an RV32IMA core with an sv32 MMU running mainline Linux 6.12 on a ULX3S 85F FPGA — 32 MB SDRAM, microSD, HDMI console, USB keyboard, networking, and it boots standalone off a phone charger.

A dual-core, 5-stage pipelined RV32IMA RISC-V SoC implemented in Verilog for the Nexys A7-100T FPGA. Features split L1 caches, hardware atomic operations (LR/SC), and a FastAPI web dashboard for real-time UART bootloading.

A RISC-V MCU Flash loader: FE310 + QSPI Flash IS25LP032D Red-V Board

herve, the rv simulator is a simple risc-v RV32IMA ISA simulator.

Real Linux on a Raspberry Pi Pico, with its own PS/2 keyboard and VGA screen — the RP2040 emulates a RISC-V CPU, SPI PSRAM becomes system memory, and the guest drives real GPIO pins.

Enable multi-agent workflows with built-in document management, task automation, and app development for efficient knowledge and project handling.