memory-mapped-io

Cross-platform C++20 header-only library for memory mapped file IO

Virtuoso is a single-unit, zero-dependency Delphi library that provides unified, thread-safe, generic access to memory-mapped buffers and files.

Fast text file analyzer with memory-mapped I/O and SIMD. Counts lines, detects encoding, finds delimiters. ~1.4 GB/s throughput.

MSX Dual Disk Drive Controllers - MSX DOS1 and MSX DOS2 different designs - fully compatible with MSX standards - Based on Memory Mapped IO Registers

Moved to codeberg

A CLI tool to find unreferenced assets in source files

PThread File Analyzer is a C++ tool for multi-threaded file analysis using POSIX threads and memory-mapped I/O. It computes statistics like word, line, and character counts, with optional CPU core affinity and result export. Designed for POSIX systems like macOS.

Mahjong hand analyzer: precomputed target sets scanned by a memory-mapped C engine, exposed through ctypes and Android JNI, with a FastAPI web app and a React Native app.

A single-file, cross-platform Zig library for memory mapping large files (such as GGUFs) efficiently and effectively.

Demonstrate modern stealer evasion techniques in Rust for security research and academic study of advanced malware behaviors.

FPGA hardware acceleration projects using SystemVerilog, AXI, DMA, C drivers, pipelining, and parallel compute architectures.

SystemVerilog model of the Intel 8088 microprocessor bus interfacing to memory and I/O — Moore and Mealy FSM memory/IO modules, SystemVerilog interfaces with modports, a bus-functional model driving encrypted 8088 IP, and a self-checking testbench. Intro to SystemVerilog course project.

Lock-free SPSC ring buffer, zero-allocation hot path, UDP multicast, deterministic crash recovery via event sourcing.

An example on how to use the PEV1100 library on your IFC1210 using ELDK 5.2.

UART driver development in Embedded C for a RISC-V processor using register-level programming, Memory-Mapped I/O, and loopback testing.

MicroBlaze FPGA embedded system on Nexys DDR using Vivado/Vitis, AXI GPIO peripherals, UART, and C firmware for memory-mapped switch-to-LED hardware control.

High-throughput concurrent Java search engine with BM25 scoring, primitive array-backed inverted index, StampedLock optimization, and zero-GC memory-mapped ingestion. Achieves sub-millisecond query latency and stable heap under concurrent read/write load.

Contents of the workshop "Assembler Programming" at the University of Rostock.

Build an OpenAI-compatible Rust API gateway that routes LLM requests across Anthropic, OpenAI, Gemini, and AWS Bedrock.