I am a B.Tech Electronics and Communication Engineering student at VIT-AP, specializing in VLSI design with hands-on experience in RTL-to-GDSII flow, analog/digital/mixed-signal circuits, and semiconductor technology. My academic journey is complemented by internships and projects that bridge theory with real-world applications in chip design, FPGA systems, and circuit verification.
- VLSI Design: Verilog, SystemVerilog, UVM, RTL-to-GDSII, Static Timing Analysis
- EDA Tools: Cadence Virtuoso, Genus, Innovus, Tempus, Voltus, Xilinx Vivado
- Circuit Design: 6T SRAM, Op-Amps, Amplifiers, Data Converters, Logic Circuits
- Programming: Python, Java, C, Embedded C | MATLAB, ROS
- Hardware: Oscilloscope, Multimeter, Signal Generators, FPGA (Zynq-7000)
- IIT Jammu (Summer Intern, 2025): Designed Verilog-based hardware blocks for a Quantum Key Distribution (QKD) pipeline on FPGA, achieving sub-µs latency and <10% LUT usage. Integrated radix-16 NTT architecture for secure key compression.
- MANIT Bhopal (Summer Intern, 2024): Developed a 3-DOF robotic manipulator with trajectory planning in MATLAB, integrating voice and vision-based control in ROS.
- Physical Design and Static Timing Analysis.
- Enhancing skills in AWS Cloud Computing with a focus on IaaS, PaaS, SaaS.
- Languages: C, Java, Python, Verilog
- VLSI Tools: Cadence Virtuoso, Xilinx Vivado,Eda plyground.
- Cloud Platforms: AWS
- VLSI Design Projects: Digital/analog circuit design, ASIC/FPGA development, combinational/sequential circuits.
- FPGA and Hardware Design: Working with Zynq-7000, Verilog, or VHDL projects.
- Cloud Computing for VLSI: Integration of cloud platforms like AWS for VLSI simulation and design workflows.
- Open Source Projects: Anything related to Electronics, Semiconductors, or Digital Design.
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Advanced Physical Design: Gaining deeper insights into Physical Design flows, Timing Closure, and Layout Optimization.
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RTL to GDSII Flow: Understanding best practices for synthesis, placement, routing, and verification.
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Static Timing Analysis (STA): Looking for guidance on mastering clock tree synthesis (CTS) and timing analysis techniques.
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Power Optimization Techniques: Learning more about low-power design methodologies for digital circuits.
- Cloud Services: Proficient in IaaS, PaaS, SaaS models
- AWS Services: Familiar with EC2, S3, RDS, Lambda, and IAM
- Cloud Architecture: Knowledge of designing scalable and reliable cloud architectures
- Exploring AWS services like AWS Lambda for serverless computing and AWS CloudFormation for infrastructure as code.
- 📧 Email: [email protected]
